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review.coreboot.org / coreboot / 59356ca48b620b7be431455fa4c3332bc2a25a24 / src / northbridge / intel / i440bx / raminit.c
  1. 59356ca 440BX: Do not hardcode DIMM number + size anymore. by Keith Hui · 14 years ago
  2. 01ce601 This patch is from 2009-10-20 by Uwe Hermann · 14 years ago
  3. 8b643cea Add (parts of the) support for multiple DIMMs on the Intel 440BX chipset. by Uwe Hermann · 16 years ago
  4. 1683cef Remove the unnecessary memctrl[] indirection, 440BX only has one by Uwe Hermann · 16 years ago
  5. 2ee6779 The ARRAY_SIZE macro is convenient, yet mostly unused. Switch lots of by Carl-Daniel Hailfinger · 16 years ago
  6. 45db366 A duplicate register address is incremented in table register_values. by Mats Erik Andersson · 16 years ago
  7. 7e61e45 Please bear with me - another rename checkin. This qualifies as trivial, no by Stefan Reinauer · 17 years ago
  8. 9b80a8d Drop duplicated and unneeded #defines from some northbridges (trivial). by Uwe Hermann · 17 years ago
  9. bc359473 Minor tweaks in the 440BX RAM init code (trivial). by Uwe Hermann · 17 years ago
  10. 861f964 Lower the RAM init delays we use on the Intel 440BX. by Uwe Hermann · 17 years ago
  11. f5a6fd2 Various 440BX and Tyan S1846 related minor changes and fixes (trivial): by Uwe Hermann · 17 years ago
  12. 7ea18cf Cosmetics (trivial). by Uwe Hermann · 17 years ago
  13. 941a6f0 Fix typo: s/PRINT_DEBUG_/PRINT_DEBUG/ (trivial). by Uwe Hermann · 17 years ago
  14. 1a9c892 Initial Intel 440BX RAM initialization framework. by Uwe Hermann · 17 years ago
  15. cb8eab4 add framework for i440bx chipset by Richard Smith · 18 years ago