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review.coreboot.org / coreboot / 5910aa88a775bf37ebe445fa89c34389add000b6 / src / include / device
  1. baae2d2 Add support for HM70 and NM70 LPC bridge by Stefan Reinauer · 12 years ago
  2. 5869fa2 Allow shutting down internal graphics if plugin graphics are preferred by Patrick Georgi · 12 years ago
  3. 0b08515 Change uma_resource() to use new type IORESOURCE_UMA_FB. by Kyösti Mälkki · 12 years ago
  4. cc55b9b Define global uma_memory variables by Kyösti Mälkki · 12 years ago
  5. 63f8c08 Add global uma_resource() by Kyösti Mälkki · 12 years ago
  6. 0fa50a1 MPTAPLE: generate from devicetree.cb by Sven Schnelle · 12 years ago
  7. 2596283 Lenovo X60: correct SDHCI write protect polarity by Jonathan A. Kollasch · 12 years ago
  8. 97de28d PCI Type2 config must die by Ronald G. Minnich · 12 years ago
  9. 2c08f6a AGESA F15 wrapper for Trinity by zbao · 12 years ago
  10. 042c146 Use broadcast SIPI to startup siblings by Sven Schnelle · 12 years ago
  11. 691c9f0 Add support for Panther Point to SPI driver by Stefan Reinauer · 12 years ago
  12. 1c56d9b Add SPI flash driver by Stefan Reinauer · 12 years ago
  13. 8049fc9 Allow device ID arrays in the PCI driver structure by Vadim Bendebury · 12 years ago
  14. dc8448fd Add a helper function to determine the number of enabled CPUs by Stefan Reinauer · 12 years ago
  15. 90dcdd4 Add support for enabling PCIe Common Clock and ASPM by Duncan Laurie · 13 years ago
  16. 1c89e90 Add RDC R8610 PCI IDs. by Rudolf Marek · 12 years ago
  17. 6f88a6e Add helper function to find a Local APIC by ID in the device tree. by Duncan Laurie · 13 years ago
  18. e41745e pci_ids: Add AMD F15h model 00-0f and F10h cpu HT device pci ids by Kerry Sheh · 13 years ago
  19. c0a6c6b Add OPROM mapping support to coreboot by Stefan Reinauer · 13 years ago
  20. 52bfa4d RD890: pci_ids update by Kerry Sheh · 13 years ago
  21. 0e6344e SB800: Sata Enable bus master and enable ahci for AHCI/RAID mode by Kerry Sheh · 13 years ago
  22. f8adf7a pci_ids: Add sb800 SATA device raid mode device id by Kerry Sheh · 13 years ago
  23. 164bcfd Add automatic SMBIOS table generation by Sven Schnelle · 13 years ago
  24. 7c0c64e Addition of Family12/SB900 wrapper code by efdesign98 · 13 years ago
  25. 23d3dfa Correct wrong PCI ID for VIA K8M890 Chrome. by Alexandru Gagniuc · 13 years ago
  26. f191c72 Enable AHCI mode and hide IDE controller to reduce boot time. by Scott Duplichan · 13 years ago
  27. f2ed23f Adds RS740 HT and internal graphics PCI ids. by Ivaylo Valkov · 13 years ago
  28. 20f7f3b pci1x2x: add PCI1510 device IDs by Sven Schnelle · 13 years ago
  29. 98fcc09 Add AMD SR56x0 support. by Zheng Bao · 13 years ago
  30. b8269e2 Fix a simple whitespace error in src/include/device/device.h by Sven Schnelle · 14 years ago
  31. 270a908 Add subsystemid option to sconfig by Sven Schnelle · 14 years ago
  32. 025ead7 Extended K8T890 driver to include the K8T800 and K8M800 northbridges by Alexandru Gagniuc · 14 years ago
  33. 87fcffa Wrap CONFIG_MAINBOARD_PCI_SUBSYSTEM_{VENDOR,DEVICE}_ID in weak functions by Patrick Georgi · 14 years ago
  34. 38b1f3b Add PCI ID's for VIA K8T800 and K8M800 northbridges. by Alexandru Gagniuc · 14 years ago
  35. 84f59ae Add AMD SB800 southbridge support via cimx_wrapper. by Kerry She · 14 years ago
  36. 40992d3 Add RS785(RS880) support. Just few pci_ids. by Zheng Bao · 14 years ago
  37. 3a4ed15 W83627DHG/W83627EHG fixups for virtual LDNs. by Uwe Hermann · 14 years ago
  38. e080bca Add pci id and ops for VT8237A SATA controller by Tobias Diedrich · 14 years ago
  39. 2210135 This adds the VT8237A LPC device id and the pci_driver struct in vt8237r_lpc.c by Tobias Diedrich · 14 years ago
  40. e487047 Various cosmetic and coding style fixes in src/devices. by Uwe Hermann · 14 years ago
  41. d50b43a This adds pci device ids and pci_driver structs for the K8T890 CF by Tobias Diedrich · 14 years ago
  42. d453dd0 Cosmetics and coding style fixes in devices/*. by Uwe Hermann · 14 years ago
  43. 4b42a62 Factor out a few commonly duplicated functions from northbridge.c. by Uwe Hermann · 14 years ago
  44. 5225520 Remove duplicate line from pci_ids.h. by Jonathan Kollasch · 14 years ago
  45. d6b4f1c Fix some wrong capitalizations, reformat comments, fix a typo. by Stefan Reinauer · 14 years ago
  46. e0a000c Add support for reserved regions to resources and coreboot tables. by Myles Watson · 14 years ago
  47. 7eac445 Always enable parent resources before child resources. by Myles Watson · 14 years ago
  48. 894a347 Same conversion as with resources from static arrays to lists, except by Myles Watson · 14 years ago
  49. 356f848 Fix some of Peter's suggestions for the Nokia IP530. by Myles Watson · 14 years ago
  50. 84e8e45 Remove the rest of cardbus_scan_bus. by Myles Watson · 14 years ago
  51. 2ad8ab8 Fixes for Nokia IP530 and associated drivers. by Marc Bertens · 14 years ago
  52. c25cc11 Use lists instead of arrays for resources in devices to reduce memory usage. by Myles Watson · 14 years ago
  53. 14e2277 Since some people disapprove of white space cleanups mixed in regular commits by Stefan Reinauer · 14 years ago
  54. f932c2e Add RS785G, looks like it works although it is RV620. by Rudolf Marek · 14 years ago
  55. 8069eb1 by Zheng Bao zheng.bao · 14 years ago
  56. b025911 1. Move run_bios prototype to device.h by Myles Watson · 15 years ago
  57. de3206a This is a general cleanup patch by Stefan Reinauer · 15 years ago
  58. d27c08c Remove drivers/pci/onboard. The only purpose was for option ROMs, which are by Myles Watson · 15 years ago
  59. 312673c Improve coreboot build output and eliminate some warnings: by Uwe Hermann · 15 years ago
  60. ea92185 Add few missing prototypes, and remove few unused (thus lonelly) variables. by Maciej Pijanka · 15 years ago
  61. 3fe6b70 Add const to get rid of some warnings when passing quoted strings. by Myles Watson · 15 years ago
  62. 6e23576 Remove some warnings. by Myles Watson · 15 years ago
  63. 00003ae If no pci access method has been set for the device tree so far (e.g. by Carl-Daniel Hailfinger · 15 years ago
  64. 1825be2 Get the Via EPIA-N(L)/CN400 to a reasonable level of maturity:: by Jon Harrison · 15 years ago
  65. f5c38c0 Fix a redundant declaration warning (trivial) by Stefan Reinauer · 15 years ago
  66. 4d933dd Rewrite interrupt handling in coreboot to be more comprehensible and by Stefan Reinauer · 15 years ago
  67. bd4f2f8 Fix many things for via/epia-m700 to build. by Myles Watson · 15 years ago
  68. 29cc9ed Move the v3 resource allocator to v2. by Myles Watson · 15 years ago
  69. 1a692d8 Add support for the Intel Eagle Heights development board. by Thomas Jourdan · 15 years ago
  70. 9a7368d I missed three files. by Jon Harrison · 15 years ago
  71. 0867062 This patch unifies the use of config options in v2 to all start with CONFIG_ by Stefan Reinauer · 15 years ago
  72. cd5d756 Use the debugging functions to print out the tree and resources. by Myles Watson · 15 years ago
  73. bb3d812 Bring v3-style debug output to v2. Fix a minor typo. by Myles Watson · 15 years ago
  74. d9b1c4f This patch adds support for the BCM21000 (aka HT-2100) PCIe bridge. by Mondrian nuessle · 15 years ago
  75. 4855f56 add define for Role-Based Error Reporting to PCIe defines (trivial) by Stefan Reinauer · 15 years ago
  76. 3081bdf Drop CONFIG_CHIP_NAME. Those config statements in Config.lb should by Stefan Reinauer · 15 years ago
  77. be7f798 This, ladies and gentlement, is commit #4000. by Stefan Reinauer · 16 years ago
  78. 43b29cf Fix mmconf (PCIe memory mapped config space access) support in v2. It was by Stefan Reinauer · 16 years ago
  79. 2b34db8 coreboot-v2: drop this ugly historic union name in v2 that was dropped in v3 by Stefan Reinauer · 16 years ago
  80. 43bb9cd This patch gets rid of all the implicit definition warnings for serengeti except get_nodes. by Myles Watson · 16 years ago
  81. 5d7a1c8 Revert i945/ICH7 PCI IDs to be hard-coded numbers instead of #defines. by Uwe Hermann · 16 years ago
  82. bddc693 i945/ICH7: Use #defines from pci_ids.h (trivial). by Uwe Hermann · 16 years ago
  83. debb11f Support for the Intel ICH7 southbridge. by Stefan Reinauer · 16 years ago
  84. b7d781d Move AMD RS690 and SB600 PCI IDs to pci_ids.h where they should be. by Uwe Hermann · 16 years ago
  85. d9f29c8 This patch adds support for the VIA VT8237S south bridge. The VT8237R programming remains unchanged (tested by Rudolf Marek · 16 years ago
  86. 6adfaa69 This patch adds PCI device IDs for the Intel EP80579 Integrated Processor, by Ed Swierk · 16 years ago
  87. 316e07f Following patch adds K8M890 support. It initializes the AGP and graphics UMA. by Rudolf Marek · 16 years ago
  88. 4f83d7e oops. sorry, wrong checkin. This patch backs out r3155 and instead contains the by Ed Swierk · 16 years ago
  89. bd3f93e Add support for the Via CN700 with a C7 CPU and DDR2 RAM. Only a single DIMM is by Corey Osgood · 17 years ago
  90. 10aca3c This patch fixes the decoding of the IO address range 0x0820->0x0827 into the by Florentin Demetrescu · 17 years ago
  91. f8ee180 Rename almost all occurences of LinuxBIOS to coreboot. by Stefan Reinauer · 17 years ago
  92. 9cb314b Add Intel 3100 integrated northbridge/southbridge/superio PCI IDs. by Ed Swierk · 17 years ago
  93. 447aafe Restructure/rename/comment a few 82371XX-related PCI IDs (trivial). by Uwe Hermann · 17 years ago
  94. 31e805d * Maintaining SiS south bridge device IDs. * Strip unnecessary driver modules. by Morgan Tsai · 17 years ago
  95. b294582 Add PCI IDs for most Intel southbridges of the 82801 series by Uwe Hermann · 17 years ago
  96. a29ec06 Restructure the PCI IDs list for the ICH* chipsets from ICH/ICH0 up to by Uwe Hermann · 17 years ago
  97. 218c265 1. vgabios removed, will go to extra repository by Morgan Tsai · 17 years ago
  98. 418bc91 Add support for the VIA VT8237R southbridge. by Rudolf Marek · 17 years ago
  99. c49b834 Add SiS device IDs for further update. by Morgan Tsai · 17 years ago
  100. 22c6afc Drop duplicate 82371AB device IDs (trivial). by Uwe Hermann · 17 years ago