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coreboot
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58955be0aab666dc40f7c0f9e31966cc605e2c12
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src
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mainboard
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google
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beltino
/
devicetree.cb
af4bd56
sb/intel: Use `bool` for PCIe coalescing option
by Angel Pons
· 2 years, 8 months ago
ba5761a
cpu/intel/haswell: Factor out ACPI C-state values
by Angel Pons
· 3 years, 10 months ago
8084b38
sb/intel/lynxpoint/sata: Always use AHCI mode
by Angel Pons
· 3 years, 10 months ago
9f78127
lynxpoint: Factor out PIRQ routing from devicetree
by Angel Pons
· 4 years, 1 month ago
4276050
mb/*/*/devicetree.cb: Normalize disabled PIRQ values
by Angel Pons
· 4 years, 1 month ago
8aab787
haswell: Move some MRC settings to devicetree
by Angel Pons
· 4 years, 1 month ago
a0259b4
mb/google/{beltino,jecht}: Drop SIO configuration lines
by Nico Huber
· 4 years, 8 months ago
3044af7
mb/google,samsung/*: Add LPC TPM chip driver to devicetree
by Matt DeVillier
· 6 years ago
81ae67a
Add Haswell Chromeboxes/Chromebase using variant board scheme
by Matt DeVillier
· 8 years ago