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review.coreboot.org / coreboot / 56621e1e577164e44001f1bd25b2dc5171fbfc52 / src / soc / intel / alderlake / chipset_pch_s.cb
  1. 56621e1 soc/intel/alderlake/{chipset.cb,chipset_pch_s.cb}: Set P2SB as hidden by Michał Żygowski · 1 year, 9 months ago
  2. 82043f5 soc/intel/alderlake: Add missing TDP and Power Limits for ADL-S by Michał Żygowski · 2 years, 1 month ago
  3. 75a49fe soc/intel/alderlake: add chipset devicetree for ADL-S by Michał Kopeć · 2 years, 4 months ago