- 56621e1 soc/intel/alderlake/{chipset.cb,chipset_pch_s.cb}: Set P2SB as hidden by Michał Żygowski · 1 year, 9 months ago
- f7f7b3b soc/intel/alderlake: Add ADL-P 4+4 with 28W TDP by Patrick Rudolph · 1 year, 5 months ago
- a16ed34 soc/intel/alderlake: add power limits for Alder Lake-N 7W soc by Simon Yang · 2 years ago
- 9e86b71 soc/intel/alderlake: Add new pcie5 alias for raptorlake by Bora Guvendik · 2 years ago
- 3f6de86 soc/intel/alderlake: Rename pcie5 alias by Bora Guvendik · 2 years ago
- 1b44c81 soc/intel/alderlake: RPL-P power limits and VR settings by Jeremy Compostella · 2 years, 2 months ago
- 596d5bc soc/intel/alderlake: add power limits for Alder Lake-N SKUs by Vidya Gopalakrishnan · 2 years, 3 months ago
- d8ea360 soc/intel/alderlake: Add support for UFS controller by Meera Ravindranath · 2 years, 5 months ago
- 7f8ab00 soc/intel/adl: Replace dt `HeciEnabled` by `HECI1 disable` config by Subrata Banik · 2 years, 8 months ago
- 38fcf40 soc/intel/alderlake: Add ADL-P 2+8+2 (28W) VR config by Curtis Chen · 2 years, 7 months ago
- dbe92ea soc/intel/alderlake: Add eMMC device into chipset.cb by Krishna Prasad Bhat · 2 years, 7 months ago
- 150fee6 soc/intel/alderlake: Update the ADL-P SKU parameters for VR domains by Curtis Chen · 2 years, 8 months ago
- 0c54461 soc/intel/alderlake: Add ADLP 4+4+2 power configurations by Curtis Chen · 2 years, 9 months ago
- 8c45f23 soc/intel/alderlake: Set `pch_thermal_trip` for Dynamic Thermal Shutdown by Subrata Banik · 2 years, 9 months ago
- 21c431b soc/intel/alderlake: add power limits for Alder Lake-M 282 SKU by Sumeet Pawnikar · 2 years, 11 months ago
- 697d6a8 soc/intel/alderlake: Add ADLP 242 power configurations by Tracy Wu · 2 years, 11 months ago
- eaf87a9 soc/intel/alderlake: set power limits dynamically for thermal by Sumeet Pawnikar · 3 years ago
- d37a419 soc/intel/adl: Update power limits for ADL-M SKU by Sumeet Pawnikar · 3 years, 1 month ago
- c0c4777 soc/intel/alderlake: set default PL4 values for different SKUs by Sumeet Pawnikar · 3 years ago
- b2513fa mb/*/{brya,adlrvp}: move cpu_cluster static configuration to chipset.cb by MAULIK V VAGHELA · 3 years ago
- 339f0e7 soc/intel/alderlake: Add support for I2C6 and I2C7 by Varshit B Pandya · 3 years, 1 month ago
- f09b39b soc/intel/alderlake: Correct Bus and Device of Touch Host Controller by Varshit B Pandya · 3 years, 2 months ago
- aa49608 soc/intel/adl: Add SKU specific power limits support by Sumeet Pawnikar · 3 years, 3 months ago
- 8a0aea8 soc/intel/alderlake: Add IDE-R and KT device into chipset.cb by Subrata Banik · 3 years, 3 months ago
- cea4f92 soc/intel/alderlake: Add CrashLog implementation for Intel ADL by Francois Toguo · 3 years, 4 months ago
- 81f70a9 soc/intel/alderlake: Remove obsolete CNVi Bluetooth PCI device by Cliff Huang · 3 years, 6 months ago
- 0c057c2 soc/intel/adl, mb/google/brya: Add IPU to devicetree by Tim Wawrzynczak · 3 years, 6 months ago
- 8913b78 soc/intel: hook up new gpio device in the soc chips by Michael Niewöhner · 3 years, 8 months ago
- 4ea47c3 soc/intel/alderlake: Update chipset.cb for TCSS and USB by Eric Lai · 3 years, 8 months ago
- ff6a1e5 soc/intel/alderlake: Align chipset.cb with pci_devs.h by Eric Lai · 3 years, 9 months ago
- 092813a soc/intel/alderlake: Add initial chipset.cb by Tim Wawrzynczak · 3 years, 9 months ago