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coreboot
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555c9b6268febf001e887fbb9e3c3f0901a371ac
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src
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mainboard
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intel
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tglrvp
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romstage_fsp_params.c
555c9b6
soc/intel/tigerlake: Remove Jasper Lake SoC references
by Aamir Bohra
· 4 years, 5 months ago
078bc41
mainboard/[g-p]*: Remove copyright notices
by Patrick Georgi
· 4 years, 5 months ago
9900cf8
mb/intel/tglrvp: Add memory config for Tiger Lake UP4
by Srinidhi N Kaushik
· 4 years, 5 months ago
fdba0cd
mb/intel/tglrvp: add Tiger Lake memory initialization support
by Srinidhi N Kaushik
· 4 years, 6 months ago
ebb2d3c
mb/intel/tglrvp: Add initial mainboard code
by Ravi Sarawadi
· 4 years, 8 months ago