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4f7fe494a009a6edc37a5e897de5f5ae32fbb055
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src
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mainboard
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siemens
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mc_apl1
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variants
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mc_apl6
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mainboard.c
4f7fe49
mb/siemens/mc_apl6: Adjust clock lines used on PCIe-2-PCI bridge
by Werner Zeh
· 4 years, 9 months ago
0dc87ef
mb/siemens/mc_apl6: Add new mainboard based on mc_apl3
by Werner Zeh
· 4 years, 10 months ago