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4d177e47c3c5e2bc173f81767846ae197a841d1f
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src
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northbridge
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intel
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sandybridge
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raminit_ivy.c
89ae6b8
nb/intel/sandybridge: Use cached CPUID
by Angel Pons
· 4 years, 5 months ago
7c49cb8
nb/intel/sandybridge: Tidy up code and comments
by Angel Pons
· 4 years, 5 months ago
f3f36fa
src (minus soc and mainboard): Remove copyright notices
by Patrick Georgi
· 4 years, 5 months ago
8852188
nb/intel/sandybridge: Add a bunch of MCHBAR defines
by Angel Pons
· 4 years, 7 months ago
1aba2a3
nb/intel/sandybridge: Make MCHBAR arithmetics consistent
by Angel Pons
· 4 years, 7 months ago
065857e
arch/io.h: Drop unnecessary include
by Kyösti Mälkki
· 5 years ago
a342f39
src: Remove unneeded whitespace
by Elyes HAOUAS
· 6 years ago
f369e60
northbridge/intel: Remove unneeded includes
by Elyes HAOUAS
· 6 years ago
dabebc3
nb/intel/sandybridge: support more XMP timings
by Dan Elkouby
· 6 years ago
9ed74b5
nb/intel/ivybridge: Improve CAS freq selection
by Arthur Heymans
· 7 years ago
cb7d6a1
nb/intel/sandybridge/raminit: Add default values
by Patrick Rudolph
· 8 years ago
cab4d3d
nb/intel/sandybridge/raminit: Add 100MHz refclock support
by Patrick Rudolph
· 8 years ago
77eaba3
nb/intel/sandybridge/raminit: Use Ivy Bridge specific values
by Patrick Rudolph
· 8 years ago
50db9c9
nb/intel/sandybridge: Use DIV_ROUND_UP macro to select timings
by Arthur Heymans
· 7 years ago
305035c
nb/intel/sandybridge/raminit: Separate Sandybridge and Ivybridge
by Patrick Rudolph
· 8 years ago