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coreboot
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4d177e47c3c5e2bc173f81767846ae197a841d1f
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src
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northbridge
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intel
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sandybridge
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chip.h
7c49cb8
nb/intel/sandybridge: Tidy up code and comments
by Angel Pons
· 4 years, 5 months ago
f3f36fa
src (minus soc and mainboard): Remove copyright notices
by Patrick Georgi
· 4 years, 5 months ago
5709e03
nb/intel/sandybridge: Migrate MRC settings to devicetree
by Patrick Rudolph
· 5 years ago
266a1f7
nb/intel/raminit (native): Read PCI mmio size from devicetree
by Patrick Rudolph
· 8 years ago
d7ee9dd
northbridge/intel: add missing #include guards
by Iru Cai
· 8 years ago
a73b931
tree: drop last paragraph of GPL copyright header
by Patrick Georgi
· 9 years ago
b890a12
Remove address from GPLv2 headers
by Patrick Georgi
· 9 years ago
8b2c8f1
sandybridge/raminit: Get max mem clock from devicetree
by Alexandru Gagniuc
· 10 years ago
a71bdc3
intel/gma: consolidate vbt code
by Vladimir Serbinenko
· 10 years ago
1783a3c
ivybridge: LVDS gfx init.
by Vladimir Serbinenko
· 10 years ago
234781e
northbridge: Trivial - drop trailing blank lines at EOF
by Edward O'Callaghan
· 10 years ago
a46a712
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
by Paul Menzel
· 11 years ago
fee73df
Auto-declare chip_operations
by Kyösti Mälkki
· 12 years ago
dd585b8
Update ivybridge graphics initialization
by Duncan Laurie
· 12 years ago
00636b0
Add support for Intel Sandybridge CPU (northbridge part)
by Stefan Reinauer
· 12 years ago