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review.coreboot.org / coreboot / 4cb8776c31ceb4a5b9e353b2e9b2a4f751e1dc54 / src / mainboard / intel / adlrvp / memory.c
  1. 4cb8776 mb/intel/adlrvp: Refactor lpddr4_mem_config structure by Subrata Banik · 3 years, 9 months ago
  2. 3a873b5 mb/intel/adlrvp: Disable dq_pins_interleaved for DDR4/5 RVP by Subrata Banik · 3 years, 9 months ago
  3. c046dd0 mb/intel/adlrvp: Replace if-else-if ladder with switch construct by Sridhar Siricilla · 3 years, 10 months ago
  4. 0a61ece mb/intel/adlrvp: Refactor ADLRVP code to get rid of 'variants/baseboard' by Subrata Banik · 3 years, 10 months ago[Renamed (98%) from src/mainboard/intel/adlrvp/variants/adlrvp_p/memory.c]
  5. 7029665 mb/intel/adlrvp: Add support for DDR5 memory by Subrata Banik · 3 years, 10 months ago
  6. b544fe4 mb/intel/adlrvp: Add dq_pins_interleaved into 'struct mb_cfg' by Subrata Banik · 3 years, 10 months ago
  7. 16e4106 mb/intel/adlrvp: Add ADL-P romstage mainboard code by Subrata Banik · 3 years, 11 months ago