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review.coreboot.org / coreboot / 4c7eee27447e1a41808a11be8ce55031e97fdccf / src / soc / intel / baytrail / romstage / romstage.c
  1. 4c7eee2 postcar: Make more use of postcar_frame_add_romcache() by Nico Huber · 5 years ago
  2. c641f7e cpu/intel/car: Prepare for C_ENVIRONMENT_BOOTBLOCK by Kyösti Mälkki · 6 years ago
  3. a75ab2c cpu/intel/car: Drop remains of setup_stack_and_mtrrs() by Kyösti Mälkki · 6 years ago
  4. acaa581 soc/intel: Drop romstage_after_car() by Kyösti Mälkki · 6 years ago
  5. d5d20d0 soc/intel/baytrail: Implement POSTCAR stage by Arthur Heymans · 6 years ago
  6. f6cfbf3 soc/intel/baytrail: Use postcar_frame functions to set up frame by Arthur Heymans · 6 years ago
  7. 55d6238 src: Remove unneeded include <cbfs.h> by Elyes HAOUAS · 6 years ago
  8. 45022ae intel: Use CF9 reset (part 1) by Patrick Rudolph · 6 years ago
  9. 88607a4 src: Use tabs for indentation by Elyes HAOUAS · 6 years ago
  10. db70f3b drivers/tpm: Add TPM ramstage driver for devices without vboot. by Philipp Deppenwiese · 6 years ago
  11. 39303d5 src/soc: Use "foo *bar" instead of "foo* bar" by Elyes HAOUAS · 6 years ago
  12. c07f8fb security/tpm: Unify the coreboot TPM software stack by Philipp Deppenwiese · 6 years ago
  13. bc8762e src: Fix a typo on "mtrr" by Elyes HAOUAS · 6 years ago
  14. d88fb36 security/tpm: Change TPM naming for different layers. by Philipp Deppenwiese · 7 years ago
  15. 64e2d19 security/tpm: Move tpm TSS and TSPI layer to security section by Philipp Deppenwiese · 7 years ago
  16. 47dffa5 chromeec: Remove checks for EC in RO by Daisuke Nojiri · 7 years ago
  17. 959cab4 vboot: Remove get_sw_write_protect_state callback by Julius Werner · 7 years ago
  18. e6ff159 soc/intel: add IS_ENABLED() around Kconfig symbol references by Martin Roth · 7 years ago
  19. afe8aee lib: put romstage_handoff implementation in own compilation unit by Aaron Durbin · 8 years ago
  20. 77e1399 romstage_handoff: remove code duplication by Aaron Durbin · 8 years ago
  21. de01136 intel post-car: Increase stacktop alignment by Kyösti Mälkki · 8 years ago
  22. 8cd723b lib/prog_loaders: use common ramstage_cache_invalid() by Aaron Durbin · 8 years ago
  23. 038e724 src/soc: Capitalize CPU, ACPI, RAM and ROM by Elyes HAOUAS · 8 years ago
  24. f5cfaa3 soc/intel/baytrail: use common Intel ACPI hardware definitions by Aaron Durbin · 8 years ago
  25. e5c00a5 intel post-car: Consolidate choose_top_of_stack() by Kyösti Mälkki · 8 years ago
  26. 65e8f64 intel romstage: Use run_ramstage() by Kyösti Mälkki · 8 years ago
  27. 65cc526 Ignore RAMTOP for MTRRs by Kyösti Mälkki · 8 years ago
  28. 0e92bb0 tree wide: Convert "if (CONFIG_.*_TPM.*)" to "if (IS_ENABLED(...))" by Denis 'GNUtoo' Carikli · 8 years ago
  29. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  30. 86091f9 cpu/mtrr.h: Fix macro names for MTRR registers by Alexandru Gagniuc · 9 years ago
  31. 9796f60 coreboot: move TS_END_ROMSTAGE to one spot by Aaron Durbin · 9 years ago
  32. a400327 chromeos: vboot and chromeos dependency removal for sw write protect state by Paul Kocialkowski · 9 years ago
  33. 41607a4 cbmem: add indicator to hooks if cbmem is being recovered by Aaron Durbin · 9 years ago
  34. 4fbac46 cbmem: Unify CBMEM init tasks with CBMEM_INIT_HOOK() API by Kyösti Mälkki · 10 years ago
  35. 0e90dae Move TPM code out of chromeos by Vladimir Serbinenko · 9 years ago
  36. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  37. bd74a4b coreboot: common stage cache by Aaron Durbin · 9 years ago
  38. 18ea2d3 baytrail: Change all SoC headers to <soc/headername.h> system by Julius Werner · 10 years ago
  39. bde6d30 x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer by Kevin Paul Herbert · 10 years ago
  40. 4175927 baytrail broadwell: Use timestamps internal stash by Kyösti Mälkki · 10 years ago
  41. 3a6550d timestamps: Switch from tsc_t to uint64_t by Stefan Reinauer · 11 years ago
  42. 565d409 baytrail: romstage: Add function to check SW WP status for vboot by Shawn Nematbakhsh · 10 years ago
  43. 4177db5 baytrail/rambi: spi, charger, and audio updates by Aaron Durbin · 10 years ago
  44. 730e3b0 soc: Trivial - drop trailing blank lines at EOF by Edward O'Callaghan · 10 years ago
  45. 00bf3db baytrail: snapshot power state in romstage by Aaron Durbin · 10 years ago
  46. ce727e1 baytrail: allow ramstage_cache_location() usage in ramstage by Aaron Durbin · 11 years ago
  47. 6f9947a baytrail: enable caching and prefetching in spi controller by Aaron Durbin · 11 years ago
  48. ebf7ec5 baytrail: ensure init_chromeos() is called in romstage by Aaron Durbin · 11 years ago
  49. 6e32893 baytrail: add support for S3 resume by Aaron Durbin · 11 years ago
  50. a8e9b63 baytrail: increment boot count for elog by Aaron Durbin · 11 years ago
  51. 3e0eea1 baytrail: initialize chromeos EC if present in romstage by Aaron Durbin · 11 years ago
  52. 7837be6 baytrail: SMM support by Aaron Durbin · 11 years ago
  53. 0f33307 coreboot: infrastructure for different ramstage loaders by Aaron Durbin · 10 years ago
  54. dc249f6 baytrail: add vboot ramstage verification by Aaron Durbin · 11 years ago
  55. 5f8ad56 baytrail: move early init to before mainboard by Aaron Durbin · 11 years ago
  56. bb3ee83 baytrail: set max frequency early in romstage by Aaron Durbin · 11 years ago
  57. 189aa3e baytrail: initialize punit by Aaron Durbin · 11 years ago
  58. fd039f7 baytrail: disable tco timer by Aaron Durbin · 11 years ago
  59. a64ef62 baytrail: program PUNIT memory-mapped base address by Aaron Durbin · 11 years ago
  60. 794bddf baytrail: start collecting timestamps by Aaron Durbin · 11 years ago
  61. ecf9086 baytrail: initialize graphics before MRC by Aaron Durbin · 11 years ago
  62. 9a7d7bc baytrail: add initial support by Aaron Durbin · 11 years ago