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coreboot
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4851bf28228114016cf69720422c38e92ec091eb
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src
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soc
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intel
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baytrail
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Kconfig
4851bf2
intel baytrail broadwell: Include microcode updates
by Kyösti Mälkki
· 10 years ago
89f5292
baytrail: move cache-as-ram base address to 0xfe000000
by Aaron Durbin
· 10 years ago
d2044cc
reg_script: default to n for ARCH_X86
by Isaac Christensen
· 10 years ago
d8c4f2b
baytrail: Move MRC cache code to a common directory
by Duncan Laurie
· 10 years ago
3511023
baytrail/rambi: S3 support and other updates
by Kein Yuan
· 10 years ago
d05d0db
haswell baytrail: Enable RELOCATABLE_RAMSTAGE
by Kyösti Mälkki
· 10 years ago
7d7eedd
soc/intel/baytrail/Kconfig: Remove empty line at top file
by Paul Menzel
· 10 years ago
f1d6e7e
Move baytrail-specific config to baytrail.
by Vladimir Serbinenko
· 10 years ago
53847a2
src/.../Kconfig: various small fixes to texts
by Daniele Forsi
· 10 years ago
c6313db
baytrail: Enable PCIe common clock and ASPM
by Duncan Laurie
· 11 years ago
59d1d87
baytrail: use CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED
by Aaron Durbin
· 11 years ago
13d9341
baytrail: romstage: Add config option to enable RMT
by Shawn Nematbakhsh
· 11 years ago
99ac98f
Introduce stage-specific architecture for coreboot
by Furquan Shaikh
· 10 years ago
fd33781
Move ARCH_* from board/Kconfig to cpu or soc Kconfig.
by Furquan Shaikh
· 10 years ago
4337020
Remove CACHE_ROM.
by Vladimir Serbinenko
· 11 years ago
ce7ecf9
baytrail: enable monotonic timer
by Aaron Durbin
· 11 years ago
302cbd6
baytrail: bring up APs
by Aaron Durbin
· 11 years ago
6ecdb68
baytrail: add reset support
by Aaron Durbin
· 11 years ago
08a4613
baytrail: adjust cache policy during romstage
by Aaron Durbin
· 11 years ago
c04e171
baytrail: Rearrange config options alphanumerically
by Vadim Bendebury
· 11 years ago
794bddf
baytrail: start collecting timestamps
by Aaron Durbin
· 11 years ago
9a7d7bc
baytrail: add initial support
by Aaron Durbin
· 11 years ago