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review.coreboot.org / coreboot / 467a87abcea13a1b0b61223a175cf46b16474965 / src / soc / intel / cannonlake / include / soc
  1. 467a87a Fix files with multiple newlines at the end. by Martin Roth · 5 years ago
  2. 70de396 Revert "soc/intel/cannonlake: Call into FSP siliconinit" by Martin Roth · 5 years ago
  3. dbe7f89 soc/intel/cannonlake: Call into FSP siliconinit by Lijian Zhao · 5 years ago
  4. 0ade313 soc/intel/cannonlake: Add minimal changes to call FSP Memoryinit by Lijian Zhao · 5 years ago
  5. 6dc125f soc/intel/cannonlake: Fix Build break by Lijian Zhao · 5 years ago
  6. c854b49 soc/intel/cannonlake: Use common GPIO driver by Andrey Petrov · 5 years ago
  7. 60a7e78 soc/intel/cannonlake: Add PMC headers by Andrey Petrov · 5 years ago
  8. 3c874e9 soc/intel/cannonlake: remove top_of_32bit_ram() declaration by Aaron Durbin · 5 years ago
  9. f35804b soc/intel/cannonlake: Add bootblock PCH by Andrey Petrov · 5 years ago
  10. 3e2e050 soc/intel/cannonlake: Add early CPU initialization by Andrey Petrov · 5 years ago
  11. 099f43a soc/intel/cannonlake: Add PCI dev macros and IDs by Andrey Petrov · 5 years ago
  12. ab85e2b soc/intel/cannonlake: Add bootblock.c by Andrey Petrov · 5 years ago