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review.coreboot.org / coreboot / 45ce5d897311827408b20e3c302615d9ef4dcadd / src / mainboard / intel / tglrvp / variants / tglrvp_up4 / memory.c
  1. 45ce5d8 src: Remove unused <arch/cpu.h> by Elyes HAOUAS · 3 years, 7 months ago
  2. f06d046 soc/intel/tgl and tgl mb/google,intel: Use the newly added meminit block driver by Furquan Shaikh · 3 years, 8 months ago
  3. 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 3 months ago
  4. 60ec365 mainboard/intel: Use SPDX for GPL-2.0-only files by Angel Pons · 4 years, 5 months ago
  5. 5b1f335 soc/intel/tigerlake: Reorganize memory initialization support by Furquan Shaikh · 4 years, 5 months ago
  6. 078bc41 mainboard/[g-p]*: Remove copyright notices by Patrick Georgi · 4 years, 5 months ago
  7. 9900cf8 mb/intel/tglrvp: Add memory config for Tiger Lake UP4 by Srinidhi N Kaushik · 4 years, 5 months ago
  8. 7e30358 mb/intel/tglrvp: Add TGL UP4 RVP by Wonkyu Kim · 4 years, 5 months ago