- b8b4096 mb, soc: Add the SPD_CACHE_ENABLE by Zhuohao Lee · 2 years, 7 months ago
- 3e3c456 soc/intel/tigerlake: Hook up FSP repository by Felix Singer · 3 years, 8 months ago
- f06d046 soc/intel/tgl and tgl mb/google,intel: Use the newly added meminit block driver by Furquan Shaikh · 3 years, 8 months ago
- d6ffbf0 soc/intel/tigerlake: Reflow long lines by Sridhar Siricilla · 3 years, 11 months ago
- 0cc63cc soc/intel/tigerlake: add common routine for DDR init by Nick Vaccaro · 4 years ago
- f50b662 src: Remove extra lines in license header by Elyes HAOUAS · 4 years, 1 month ago
- 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 3 months ago
- 26afd64 soc/intel/tigerlake: Check SPD is not NULL before print by Eric Lai · 4 years, 4 months ago
- 029b543 soc/intel/tigerlake: fix call to print_spd_info() by Nick Vaccaro · 4 years, 4 months ago
- 8ebbe17 soc/intel/tigerlake: Fix FSP SPD index for DDR4 by Furquan Shaikh · 4 years, 4 months ago
- 9a90a43 soc/intel/tigerlake: Disable MrcSafeConfig by Srinidhi N Kaushik · 4 years, 5 months ago
- 9734325 soc/intel/tigerlake: Add support to initialize DDR4 Memory by Varun Joshi · 4 years, 5 months ago
- a5c2709 soc/intel/tigerlake: Replace Reserved9 usage with DisableDimmCh# UPD. by Srinidhi N Kaushik · 4 years, 5 months ago
- 5b1f335 soc/intel/tigerlake: Reorganize memory initialization support by Furquan Shaikh · 4 years, 5 months ago
- 555c9b6 soc/intel/tigerlake: Remove Jasper Lake SoC references by Aamir Bohra · 4 years, 5 months ago[Renamed (98%) from src/soc/intel/tigerlake/meminit_tgl.c]
- 1c6d8a9 soc: Remove copyright notices by Patrick Georgi · 4 years, 5 months ago
- b1fa25f soc/intel/tigerlake: add memory configuration support by Nick Vaccaro · 4 years, 7 months ago