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review.coreboot.org / coreboot / 430bf0d8a96bf9bb3c343c5cf63c6ae8482c532c / src / soc / intel / baytrail / acpi / southcluster.asl
  1. 430bf0d baytrail: Add support for LPSS and SCC devices in ACPI mode by Duncan Laurie · 11 years ago
  2. b50566e baytrail: Fix _CRS to build with new IASL by Duncan Laurie · 11 years ago
  3. bb0d1ea baytrail: Add ACPI code to describe GPIO controller by Duncan Laurie · 11 years ago
  4. 3bde3d7 baytrail: interrupt routing support by Aaron Durbin · 11 years ago
  5. 93966e8 baytrail: Add default _OSC method by Duncan Laurie · 11 years ago
  6. 053bd07 baytrail: Add root bus resource regions by Duncan Laurie · 11 years ago
  7. 7fbe20b baytrail: Add reserved MMIO regions to ACPI by Duncan Laurie · 11 years ago
  8. 9a7d7bc baytrail: add initial support by Aaron Durbin · 11 years ago