- 40cb3fe commonlib/console/post_code.h: Change post code prefix to POSTCODE by lilacious · 1 year, 1 month ago
- d21b463 security/intel: Add option to enable SMM flash access only by Angel Pons · 3 years, 5 months ago
- 92f46aa src: Include <arch/io.h> when appropriate by Elyes HAOUAS · 3 years, 10 months ago
- 6217a15 southbridge/intel/common: Replace outb with post_code in finalize.c by Sindhoor Tilak · 4 years ago
- 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 2 months ago
- 78feacc security: Add common boot media write protection by Patrick Rudolph · 4 years, 7 months ago
- 182dbde src/southbridge: Use SPDX for GPL-2.0-only files by Angel Pons · 4 years, 3 months ago
- f3f36fa src (minus soc and mainboard): Remove copyright notices by Patrick Georgi · 4 years, 4 months ago
- cd49cce coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) by Julius Werner · 5 years ago
- 63626b1 sb/intel/common: Create a common PCH finalise implementation by Tristan Corrick · 6 years ago[Renamed (67%) from src/southbridge/intel/bd82x6x/finalize.c]
- 2dc6389 sb/intel/bd82x6x/finalize: Use new PMBASE API by Patrick Rudolph · 6 years ago
- 58a8953 Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location" by Arthur Heymans · 6 years ago
- e56189c pci: Move inline PCI functions to pci_ops.h by Patrick Rudolph · 6 years ago
- 8e50b6d sb/intel/bd82x6x: Let mainboard override SPI opmenu by Nico Huber · 6 years ago
- d2d2aef sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location by Arthur Heymans · 6 years ago
- 2ac149d sb/intel/bd82x6x: Revise flash ROM lockdown options by Nico Huber · 7 years ago
- 7a1a3ad southbridge/intel: add IS_ENABLED() around Kconfig symbol references by Martin Roth · 7 years ago
- 7565cf1 sb/intel/bd82x6x/finalize: Lock ETR3 CF9GR by Patrick Rudolph · 7 years ago
- c368620 sb/intel/bd82x6x/finalize: Use register name by Patrick Rudolph · 7 years ago
- 0c04720 sb/intel/bd82x6x: Add TCO_Lock in finalize step by Dennis Wassenberg · 9 years ago
- a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
- b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
- d3b194e bd82x6x, ibexpeak: Support fully locking ROM on S3 resume. by Vladimir Serbinenko · 9 years ago
- fd98c65 intel/sandybridge intel/bd82x6x: remove explicit pcie config accesses by Kyösti Mälkki · 11 years ago
- 54d6abd Drop some duplicates of PCI-e config functions by Kyösti Mälkki · 11 years ago
- d1fb564 sandybridge: Add option to lock SPI regions on resume by Nico Huber · 11 years ago
- 24d1d4b x86: Unify arch/io.h and arch/romcc_io.h by Stefan Reinauer · 11 years ago
- a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 11 years ago
- 600784e spi.h: Rename the spi.h to spi-generic.h by Zheng Bao · 11 years ago
- 04c5bae Define post codes for OS boot and resume by Duncan Laurie · 12 years ago
- 312ee0c SPI: re-init SMM SPI driver after lockdown by Duncan Laurie · 12 years ago
- f1c76ef ELOG: Don't disable SPI controller lockdown by Duncan Laurie · 12 years ago
- 54cba3b SMM: Skip locking SPI registers in finalize step by Duncan Laurie · 12 years ago
- 8e07382 Add support for Intel Panther Point PCH by Stefan Reinauer · 12 years ago