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review.coreboot.org / coreboot / 40cb3fe94dacfba0b146aae2be9c03c0a0ddb691 / src / soc / intel / skylake / finalize.c
  1. 40cb3fe commonlib/console/post_code.h: Change post code prefix to POSTCODE by lilacious · 1 year, 1 month ago
  2. 112ffd7 soc/intel/skylake: Add function to clear PMCON status bits by Subrata Banik · 2 years, 5 months ago
  3. be3e911 soc/intel/skylake: Use PCR write to disable HECI1 by Subrata Banik · 2 years, 5 months ago
  4. a0d9ad3 soc/intel/skl: Replace dt `HeciEnabled` by `HECI1 disable` config by Subrata Banik · 2 years, 6 months ago
  5. 470ca571 Move post_codes.h to commonlib/console/ by Ricardo Quesada · 3 years ago
  6. 348f2a6 soc/intel/skylake: set MSR LT_LOCK_MEMORY only when using native MP init by Michael Niewöhner · 4 years ago
  7. 6e64c1a soc/intel/common,skl: set MSR LT_LOCK_MEMORY once, not per thread by Michael Niewöhner · 4 years ago
  8. 8a64ad0 soc/intel/{skl,cnl}: drop duplicate PM ACPI timer disabling by Michael Niewöhner · 3 years, 9 months ago
  9. 92f46aa src: Include <arch/io.h> when appropriate by Elyes HAOUAS · 3 years, 10 months ago
  10. 4e8baf9 soc/intel/*: drop useless XTAL shutdown qualification code by Michael Niewöhner · 3 years, 9 months ago
  11. 0359d9d soc/intel: Make use of PMC low power program from common block by Subrata Banik · 3 years, 9 months ago
  12. 063e933 soc/intel/skylake: Align PMC offset 0x31C name with CNL by Subrata Banik · 3 years, 9 months ago
  13. d9dea65 soc/intel: Drop unused `#include <reg_script.h>` by Angel Pons · 4 years ago
  14. b658548 arch/x86: Create helper for APM_CNT SMI triggers by Kyösti Mälkki · 4 years, 1 month ago
  15. 51a5495 src: Remove unused '#include <timer.h>' by Elyes HAOUAS · 4 years, 2 months ago
  16. 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 2 months ago
  17. 3bd1e3d soc/intel/skylake: Use SPDX for GPL-2.0-only files by Angel Pons · 4 years, 3 months ago
  18. 1c6d8a9 soc: Remove copyright notices by Patrick Georgi · 4 years, 4 months ago
  19. 608fbf8 src/soc/intel: Remove unused <stdlib.h> by Elyes HAOUAS · 4 years, 7 months ago
  20. 48fb573 soc/intel/skylake: set LT_LOCK_MEMORY at end of POST by Michael Niewöhner · 4 years, 10 months ago
  21. 5199e82 soc/intel/skylake/chip: Unhide P2SB device by Patrick Rudolph · 4 years, 10 months ago
  22. 5a7dc9e soc/intel/skylake: lock down TCO on pch finalize by Michael Niewöhner · 4 years, 10 months ago
  23. c077b22 soc/intel/skylake: Make use of common thermal code for SKL by Subrata Banik · 5 years ago
  24. 8950cfb soc/intel: Use config_of() by Kyösti Mälkki · 5 years ago
  25. 7196be4 soc/intel/skylake: Remove redundant mca_configure() in ramstage by Subrata Banik · 5 years ago
  26. c338507 soc/{amd,intel}/chip: Use local include for chip.h by Elyes HAOUAS · 5 years ago
  27. 13f6650 device/mmio.h: Add include file for MMIO ops by Kyösti Mälkki · 5 years ago
  28. f1b58b7 device/pci: Fix PCI accessor headers by Kyösti Mälkki · 5 years ago
  29. 1b25c8e soc/intel/skylake: clear MCA before booting to OS by Pratik Prajapati · 6 years ago
  30. 7837c20 soc/intel/common/block: Move p2sb common functions into block/p2sb by Subrata Banik · 6 years ago
  31. c51df93 soc/intel/skylake: Select common P2SB code by Subrata Banik · 6 years ago
  32. 771d611 soc/intel/skylake: Set low maximum temperature threshold for Thermal Device by Subrata Banik · 7 years ago
  33. 1483d1f soc/intel/skylake: Enable common LPC IP by Ravi Sarawadi · 7 years ago
  34. 0818a2a soc/intel/skylake: Move SPI lock down config after resource allocation by Barnali Sarkar · 7 years ago
  35. 97a0945 soc/intel/skylake: Move DMI lock down config after resource allocation by Subrata Banik · 7 years ago
  36. 15943df soc/intel/skylake: Remove TCO lock down programming by Subrata Banik · 7 years ago
  37. 639bf8a soc/intel/skylake: Move PMC lock down config after resource allocation by Subrata Banik · 7 years ago
  38. 84f428f soc/intel/skylake: Remove ABASE lock down programming by Subrata Banik · 7 years ago
  39. b51f54b soc/intel/skylake: Move LPC lock down config after resource allocation by Subrata Banik · 7 years ago
  40. c204aaa soc/intel/skylake: Add LPC and SPI lock down config option by Subrata Banik · 7 years ago
  41. fbf1018 soc/intel/skylake: Lock sideband access in coreboot and not in FSP by Barnali Sarkar · 7 years ago
  42. c319854 soc/intel/skylake: Perform LPC offset read after lockdown operation by Subrata Banik · 7 years ago
  43. 7146445 soc/intel/skylake: Clean up code by using common FAST_SPI module by Barnali Sarkar · 7 years ago
  44. c261c4b soc/intel/skylake: Set xtal bypass on low power idle by Naresh G Solanki · 7 years ago
  45. e7ceae7 soc/intel/skylake: Use common PCR module by Subrata Banik · 7 years ago
  46. cf73c13 skylake: Do FspTempRamInit only for FSP1.1 & tidy up PCH early init by Rizwan Qureshi · 8 years ago
  47. 49eca13 soc/intel/skylake: Change name pmc_tco_regs to smbus_tco_regs by Barnali Sarkar · 8 years ago
  48. 0dddcd7 soc/intel/skylake: Cleanup patch for Skylake SoC by Barnali Sarkar · 8 years ago
  49. 6f0e6fa skylake: Finalize SMM in coreboot by Duncan Laurie · 8 years ago
  50. 6c1bf27 intel/skylake: disable ACPI PM Timer to enable XTAL OSC shutdown by Archana Patni · 9 years ago
  51. 9dca83c intel/skylake: Display ME firmware status before os boot by Dhaval Sharma · 8 years ago
  52. 7846e34 intel/skylake: disable heci1 if psf is unlocked by Archana Patni · 9 years ago
  53. e64f794 intel/skylake: More UPD params are added for PCH policy in FSP by Rizwan Qureshi · 9 years ago
  54. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  55. 1d14b3e soc/intel: Add Skylake SOC support by Lee Leahy · 9 years ago
  56. b000513 soc/intel/skylake: Use Broadwell as comparision base for Skylake SOC by Lee Leahy · 9 years ago