- 40cb3fe commonlib/console/post_code.h: Change post code prefix to POSTCODE by lilacious · 1 year, 1 month ago
- 8c97450 soc/intel/common: Define post codes by Martin Roth · 1 year, 8 months ago
- 0f068a6 drivers/intel/fsp2_0: Fix the FSP-T position by Arthur Heymans · 3 years, 2 months ago
- 7522a8f arch/x86: Move prologue to .init section by Kyösti Mälkki · 3 years, 8 months ago
- fe9d211 soc/intel/fsp-car: Use the coreboot defined stack by Arthur Heymans · 4 years, 8 months ago
- 5a66334 drivers/intel/fsp2_0: Add function to report FSP-T output by Arthur Heymans · 3 years, 8 months ago
- 379aab4 src: Remove unused 'include <cpu/x86/mtrr.h>' by Elyes HAOUAS · 4 years, 1 month ago
- 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 2 months ago
- ac95903 treewide: replace GPLv2 long form headers with SPDX header by Patrick Georgi · 4 years, 2 months ago
- 02363b5 treewide: Move "is part of the coreboot project" line in its own comment by Patrick Georgi · 4 years, 2 months ago
- 2d7173d src: Remove unused 'include <cpu/x86/cache.h>' by Elyes HAOUAS · 4 years, 3 months ago
- 1c6d8a9 soc: Remove copyright notices by Patrick Georgi · 4 years, 4 months ago
- 910490f arch/x86: Restrict use of _car_global[start|end] by Kyösti Mälkki · 4 years, 11 months ago
- 0eb9c57 arch/x86: Link walkcbfs.S instead of including it by Arthur Heymans · 6 years ago
- b66757f soc/intel: Consolidate FSP CAR setup and teardown code by Praveen hodagatta pranesh · 6 years ago[Renamed (82%) from src/soc/intel/denverton_ns/bootblock/cache_as_ram_fsp.S]
- a404133 soc/intel/denverton_ns: Add support for Intel Atom C3000 SoC by Mariusz Szafranski · 7 years ago