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review.coreboot.org / coreboot / 40cb3fe94dacfba0b146aae2be9c03c0a0ddb691 / src / soc / intel / cannonlake / chip.h
  1. 8a2c904 soc/intel/cannonlake: Use common gpio.h include by Dinesh Gehlot · 1 year, 7 months ago
  2. 67d0672 soc/intel/cannonlake: Add `disable_vmx` devtree option by Angel Pons · 2 years, 7 months ago
  3. 26f97f9 src/soc to src/superio: Fix spelling errors by Martin Roth · 2 years, 11 months ago
  4. 234e7ec soc/intel/cannonlake: Allow to configure maximum package C state by Nico Huber · 3 years, 1 month ago
  5. a979460 soc/intel/alderlake: rename CONFIG_MAX_PCIE_CLOCKS to CONFIG_MAX_PCIE_CLOCK_SRC by Rizwan Qureshi · 3 years, 4 months ago
  6. a3d3379 soc/intel/{cannonlake,icelake}: Drop unhooked `SendVrMbxCmd` by Angel Pons · 3 years, 4 months ago
  7. e9b0830 soc/intel/cannonlake: Add devicetree setting to disable turbo by Patrick Rudolph · 3 years, 6 months ago
  8. d456f65 {soc,vc,mb}/intel: Drop support for Cannon Lake SoC by Felix Singer · 3 years, 8 months ago
  9. c4f8fbd soc/intel/cnl: add panel and backlight configuration code by Michael Niewöhner · 3 years, 8 months ago
  10. d3713fd soc/intel/cannonlake: Drop unreferenced devicetree settings by Angel Pons · 3 years, 8 months ago
  11. 1e3b2ce soc/intel/cannonlake: Align SATA mode names with soc/skl by Felix Singer · 3 years, 8 months ago
  12. 50a1072 soc/intel/cnl: replace the remains of HeciEnabled by device state in dt by Michael Niewöhner · 3 years, 10 months ago
  13. a1843d8 soc/intel/{skl,cnl}: replace PM ACPI timer dt option by Kconfig by Michael Niewöhner · 3 years, 11 months ago
  14. 6e98292 soc/intel/*/chip: Remove unused devicetree entry by Patrick Rudolph · 3 years, 10 months ago
  15. a64b4f4 mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable` by Michael Niewöhner · 3 years, 10 months ago
  16. 2854f40 src/soc/intel: Drop unneeded empty lines by Elyes HAOUAS · 4 years ago
  17. 9fec889 soc/intel/{cnl,icl,jsl,tgl}: Clean up chip.h by Subrata Banik · 4 years ago
  18. d9e4594 soc/intel/cnl: Enable HECI3 depending on devicetree by Felix Singer · 4 years ago
  19. 119ace0 soc/intel/cnl: Configure FSP option PcieRpSlotImplemented by Nico Huber · 4 years, 11 months ago
  20. d7238eb soc/intel/cannonlake: make satahotplug user configurable via devicetree by Jonas Loeffelholz · 4 years, 2 months ago
  21. e40b948 soc/intel/cannonlake: Add PchPmPwrCycDur to chip options by Sridhar Siricilla · 4 years, 2 months ago
  22. 9de8c80 soc/intel/cannonlake: Use table instead of switch-case by Patrick Rudolph · 4 years, 3 months ago
  23. 061cd78 soc/intel/cannonlake: Add RP configuration settings by Christian Walter · 4 years, 3 months ago
  24. 309ccf7 cannonlake: update processor power limits configuration by Sumeet R Pawnikar · 4 years, 3 months ago
  25. e6e9fa6 soc/intel/cannonlake: Add VrPowerDeliveryDesign to chip options by Christian Walter · 4 years, 3 months ago
  26. 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 3 months ago
  27. e01054d soc/intel/cannonlake: Add DisableHeciRetry to config by Christian Walter · 4 years, 4 months ago
  28. b8a0cd1 src: Remove not used 'include <smbios.h>' by Elyes HAOUAS · 4 years, 5 months ago
  29. f5627e8 soc/intel/cannonlake: Use SPDX for GPL-2.0-only files by Angel Pons · 4 years, 4 months ago
  30. 1c6d8a9 soc: Remove copyright notices by Patrick Georgi · 4 years, 5 months ago
  31. 1af482c9 soc/intel/cannonlake: Set correct serirq mode by Jeremy Soller · 5 years ago
  32. 79ccc69 src: capitalize 'PCIe' by Elyes HAOUAS · 4 years, 6 months ago
  33. fa043c4 soc/intel/cannonlake: Plumb TetonGlacierMode into dt by Edward O'Callaghan · 4 years, 6 months ago
  34. 4d9d3f1 soc/intel/cannonlake: Allow Audio DSP OSC qualification for low power idle by Aamir Bohra · 4 years, 8 months ago
  35. c004857da soc/intel/cannonlake: Add chip config for SATA strength by Jamie Chen · 4 years, 7 months ago
  36. 3ccae2b soc/intel/cannonlake: Add VR config for CML by Jamie Chen · 4 years, 8 months ago
  37. a6eab80 soc/intel/{cnl,icl,skl,tgl}: Remove unused gpe0_en_* from chip.h by Furquan Shaikh · 4 years, 8 months ago
  38. d367503 soc/intel/cannonlake: Disable USB2 PHY Power gating by Surendranath Gurivireddy · 4 years, 10 months ago
  39. e1470ea soc/intel/cannonlake: Add chip config to override CPU flex ratio by Subrata Banik · 4 years, 9 months ago
  40. 7736bfc soc/intel/sgx: convert SGX and PRMRR devicetree options to Kconfig by Michael Niewöhner · 4 years, 10 months ago
  41. 32d47eb soc/intel: Rename <intelblocks/chip.h> by Kyösti Mälkki · 4 years, 11 months ago
  42. 8cced29 soc/intel/cnl: Remove unnecessary FSP UPD “PchPwrOptEnable” usage by Subrata Banik · 5 years ago
  43. 87bb5f5 soc/intel/cannonlake: Add config for sata devslp pad reset configuration by Aamir Bohra · 5 years ago
  44. b0b9905 soc/intel/cannonlake: Add config to disable display audio codec by Aamir Bohra · 5 years ago
  45. 662c61d soc/intel/cnl: Add provision to configure SD controller write protect pin by Aamir Bohra · 5 years ago
  46. 85d3b40 soc/intel/cannonlake: fix use of legacy 8254 timer by Matt DeVillier · 5 years ago
  47. 4821a0e soc/intel/cannonlake: Rename SOC_INTEL_COMMON_CANNONLAKE_BASE by Arthur Heymans · 5 years ago
  48. 76a8f9e soc/intel/cannonlake: Make use of gpio_pm_configure() by Subrata Banik · 5 years ago
  49. 1159a16 soc/intel/cnl: Enable VT-d by John Zhao · 5 years ago
  50. d5d89c8 soc/intel/cannonlake: Fix pcie clock number by Lijian Zhao · 5 years ago
  51. d694f6e mb/google/sarien: Add SMBIOS type 9 fields by Lijian Zhao · 5 years ago
  52. 43a3c51 mb/google/sarien: Disable S5 wake on LAN by default by Eric Lai · 5 years ago
  53. 3717256 soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig by Kane Chen · 5 years ago
  54. 250dfc0 soc/intel/cannonlake: Configure Vmx support using Kconfig by Ronak Kanabar · 5 years ago
  55. dffa8d0 soc/intel/cannonlake: Add FSP UPD to unlock GPIO pads in devicetree by Krishna Prasad Bhat · 5 years ago
  56. 9bc9da9d soc/intel/cannonlake: Configure voltage margining policies by Krzysztof Sywula · 5 years ago
  57. caa85f2 soc/intel/cannonlake: Assign FSP UPDs for HPD and Data/CLK of DDI ports by Krishna Prasad Bhat · 5 years ago
  58. 41483c9 soc/intel/cannonlake: Add required FSP UPD changes for CML by Subrata Banik · 6 years ago
  59. cd49cce coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) by Julius Werner · 5 years ago
  60. 4185de5 soc/intel/cannonlake: Add support for setting FSP-S PcieRpHotPlug from devicetree by Jeremy Soller · 5 years ago
  61. d01a995 src/soc/intel/cannonlake: Add PsysPmax setting by Gaggery Tsai · 5 years ago
  62. 6527b1a soc/intel/cannonlake: Add Whiskeylake SoC kconfig by Subrata Banik · 6 years ago
  63. acb6e13 src/soc/intel/cnl/chip.h: Fix preprocessor condition by Angel Pons · 6 years ago
  64. dc666f5 soc/intel/cannonlake: Change in SaGv options by Ronak Kanabar · 6 years ago
  65. c896e92e soc/intel/cannonlake: Add processor power limits control support by Sumeet Pawnikar · 6 years ago
  66. 55012d1 soc/intel/cannonlake: Add FSP UPD for minimum assertion width by Duncan Laurie · 6 years ago
  67. 9bf1d8f soc/intel/cannonlake: SATA and DMI power optimize by Lijian Zhao · 6 years ago
  68. 3ef7449 soc/intel/cannonlake: Auto turn on HDA controller by Lijian Zhao · 6 years ago
  69. ba82029 soc/intel/cannonlake: Declare SATA Mode clear by Lijian Zhao · 6 years ago
  70. ae75400 soc/intel/cannonlake: Add Acoustic features by Lijian Zhao · 6 years ago
  71. 79152f3 soc/intel/cannonlake: Add options for pcie ltr by Lijian Zhao · 6 years ago
  72. 2a244c6 soc/intel/cannonlake: Make static IRQ mapping for PIC mode by Subrata Banik · 6 years ago
  73. 25b387a soc/intel/cannonlake: Remove SmbusEnable by Duncan Laurie · 6 years ago
  74. 69b18f0 mb/{intel/google}: Move CNVi ASL entry from static DSDT to dynamic SSDT generation by Subrata Banik · 6 years ago
  75. 521e48c soc/intel/cannonlake: Add CNP PCH-H gpio pin definitions by praveen hodagatta pranesh · 6 years ago
  76. b269f87 soc/intel/cannonlake: Update UPD from device switch by Lijian Zhao · 6 years ago
  77. 809aeee src/soc: Fix typo by Elyes HAOUAS · 6 years ago
  78. f699c14 soc/intel/common/block/cpu: Add option to skip coreboot AP init by Subrata Banik · 6 years ago
  79. c4986eb soc/intel/common/block: Add common chip config block by Subrata Banik · 6 years ago
  80. 925ea51 soc/intel/cannonlake: Add option to skip coreboot MP init by Subrata Banik · 6 years ago
  81. 91c8e23 soc/intel/cannonlake: Add VT-d and VMX programming by Lijian Zhao · 6 years ago
  82. 2410cd9 soc/intel/cannonlake: Limit xDCI feature when VBOOT is enabled by Duncan Laurie · 6 years ago
  83. f5205a3 soc/intel/cannonlake: Add SaGv value definition by Lijian Zhao · 6 years ago
  84. 416ded8 soc/intel/cannonlake: Add more HDA Audio Link settings by Lijian Zhao · 7 years ago
  85. 1b64ae1 soc/intel/cannonlake: Add Pch iSCLK programming by Lijian Zhao · 7 years ago
  86. 93fde11 soc/intel/cannonlake: Add support for EMMC DLL update by Lijian Zhao · 7 years ago
  87. 6ad8827 mainboard/intel/cannonlake_rvp: Add support for SND_MAX98357_DA7219 by Lijian Zhao · 7 years ago
  88. 031020e soc/intel/cannonlake: Correct PMC/GPIO routing information by Lijian Zhao · 7 years ago
  89. b8dc63b ic2/designware: Move Intel i2c logic to shared driver by Chris Ching · 7 years ago
  90. 02ce837 soc/intel/cannonlake: Fix DSX_CFG macro name for AC_PRESENT by Furquan Shaikh · 7 years ago
  91. 9bb684a soc/intel/cannonlake: Install common i2c by Lijian Zhao · 7 years ago
  92. d2c6365 soc/intel/cannonlake: Use SCS common code by Bora Guvendik · 7 years ago
  93. c672043 soc/intel/cannonlake: Set platform Debug Probe Type by Lijian Zhao · 7 years ago
  94. 580bc41 soc/intel/cannonlake: Update PCIE CLKREQ programing by Lijian Zhao · 7 years ago
  95. a515849 soc/intel/cannonlake: Add lpc pci driver by Lijian Zhao · 7 years ago
  96. ac87a98 soc/intel/cannonlake: Add PMC pci drivers by Lijian Zhao · 7 years ago
  97. 0823183 soc/intel/cannonlake: Add serialio device config by Lijian Zhao · 7 years ago
  98. 2b074d9 soc/intel/cannonlake: Add common ACPI support for CNL by Lijian Zhao · 7 years ago
  99. 2678cd6 soc/intel/cannonlake: Add PrmrrSize and C6DRAM config by Subrata Banik · 7 years ago
  100. 9027e1b soc/intel/cannonlake: Init UPD params based on config by Pratik Prajapati · 7 years ago