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review.coreboot.org / coreboot / 40377c7250dd0a88f35024342e0c515b2b1c12d0 / src / soc / sifive
  1. 4a8fba9 soc/sifive/fu540: test and fix code of fu540 spi by Xiang Wang · 2 years, 9 months ago
  2. f4e1583 soc/sifive/fu540: add code for spi and map flash to memory spaces by Xiang Wang · 3 years ago
  3. d434e8b soc/sifive/fu540: Add opensbi support by Patrick Rudolph · 2 years, 11 months ago
  4. 76c4386 arch/non-x86: Flip HAVE_MONOTONIC_TIMER default by Kyösti Mälkki · 2 years, 11 months ago
  5. 313d53f src/mb/sifive/hifive-unleashed: initialize Gigabit Ethernet Controller by Xiang Wang · 3 years, 4 months ago
  6. 13f6650 device/mmio.h: Add include file for MMIO ops by Kyösti Mälkki · 3 years, 3 months ago
  7. d19f4e5 riscv: ARCH_RISCV_RV{32,64} selects ARCH_RISCV by Ronald G. Minnich · 3 years, 4 months ago
  8. 0535804 riscv: create Kconfig architecture features for new parts by Ronald G. Minnich · 3 years, 5 months ago
  9. 1d748c5 console: Change BOOTBLOCK_CONSOLE default to `y` by Nico Huber · 3 years, 4 months ago
  10. 968a23d riscv: fix non-SMP support by Philipp Hug · 3 years, 6 months ago
  11. 97ca02c soc/sifive/fu540: Add helper function to get tlclk frequency by Jonathan Neuschäfer · 3 years, 7 months ago
  12. a09c2e1 soc/sifive/fu540: Load PLL settings from a struct by Jonathan Neuschäfer · 3 years, 6 months ago
  13. 90fd072 soc/sifive/fu540: Simplify UART refclk calculation by Jonathan Neuschäfer · 3 years, 7 months ago
  14. 7c9540e riscv: add support smp_pause / smp_resume by Xiang Wang · 3 years, 8 months ago
  15. bb7f41d sifive/fu540: correct cbmem support by Philipp Hug · 3 years, 11 months ago
  16. 8ac6a19 soc/sifive/fu540: Document #if ENV_ROMSTAGE line by Jonathan Neuschäfer · 3 years, 8 months ago
  17. 0fb58f3 soc/sifive/fu540: Remove PLL parameters from sdram.c by Jonathan Neuschäfer · 3 years, 8 months ago
  18. 4e7a473 sifive/hifive-unleashed: enable CBMEM support by Philipp Hug · 3 years, 8 months ago
  19. 7c5acd4 soc/sifive: move ram_resource to mainboard by Philipp Hug · 3 years, 8 months ago
  20. df5e6f6 soc/sifive/fu540: Implement uart_platform_refclk for UART divisor calculation by Philipp Hug · 3 years, 11 months ago
  21. 9159572 soc/sifive/fu540: Initialize SDRAM by Philipp Hug · 3 years, 8 months ago
  22. 374d992 soc/sifive/fu540: Switch clock to 1GHz in romstage by Philipp Hug · 3 years, 8 months ago
  23. c014ef5 soc/sifive/fu540: create ram_resource with actual memory size by Philipp Hug · 3 years, 11 months ago
  24. 199b75f arch/riscv: provide a monotonic timer by Philipp Hug · 3 years, 8 months ago
  25. 31dbfbc soc/sifive/fu540: add SiFive supplied header files for SDRAM initialization by Philipp Hug · 3 years, 8 months ago
  26. bdd866e soc/sifive/fu540: Get SDRAM controller out of reset by Philipp Hug · 3 years, 9 months ago
  27. 18764a3 soc/sifive/fu540: Update clock settings according SiFive bootloader by Philipp Hug · 3 years, 9 months ago
  28. 7524400 uart/sifive: make divisor configurable by Philipp Hug · 3 years, 11 months ago
  29. 3d398ad soc/sifive/fu540: Initialize PLL and clock by Philipp Hug · 3 years, 11 months ago
  30. e056859 soc/sifive: fix compiler warning by Philipp Hug · 3 years, 9 months ago
  31. 2cf9990 soc/sifive/fu540: Makefile: include mtime_init in ramstage by Philipp Hug · 3 years, 9 months ago
  32. ea81928 soc/sifive/fu540: Add driver for OTP memory by Philipp Hug · 3 years, 11 months ago
  33. aa5f821 soc/sifive/fu540: add CLINT support by Xiang Wang · 3 years, 9 months ago
  34. 2e38dbe riscv: update mtime initialization by Xiang Wang · 3 years, 9 months ago
  35. a5b265b riscv: separately define stack locations at different stages by Xiang Wang · 3 years, 9 months ago
  36. 52a022f sifive/fu540: add empty sdram init and size functions by Philipp Hug · 3 years, 11 months ago
  37. 5fed693 riscv: add support for modifying compiler options by Xiang Wang · 3 years, 11 months ago
  38. 55b4645 src/sifive: Add the SiFive Freedom Unleashed 540 SoC by Jonathan Neuschäfer · 4 years, 1 month ago