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review.coreboot.org / coreboot / 3df9dbe8864adf6d41df2fe617c8818d1bad9d42 / src / include / cpu / intel / speedstep.h
  1. 40d7a45 cpu/intel: Add MSR to support enabling turbo frequency by Shaunak Saha · 8 years ago
  2. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  3. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  4. 033bb4b acpi: Generate valid ACPI processor objects by Timothy Pearson · 9 years ago
  5. 3f5f6d8 Drop prototype guarding for romcc by Stefan Reinauer · 11 years ago
  6. 8cc8468 Intel: Replace MSR 0xcd with MSR_FSB_FREQ by Patrick Georgi · 11 years ago
  7. 644e83b speedstep: Deduplicate some MSR identifiers by Patrick Georgi · 11 years ago
  8. a74af56 Overhaul speedstep code by Nico Huber · 12 years ago
  9. 41392df Merge cpu/intel/acpi.h into cpu/intel/speedstep.h by Nico Huber · 12 years ago
  10. 2bdfb48 Fixes and Sandybridge support for lapic cpu init by Stefan Reinauer · 12 years ago
  11. 2a27b20 factor out cpu power management base into a separate file. And fix a bug in by Stefan Reinauer · 14 years ago