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review.coreboot.org / coreboot / 3d45c4077665a17735c69576638dc510f96a2dff / src / mainboard / intel / emeraldlake2 / romstage.c
  1. 3d45c40 timestamps: Stash early timestamps in CAR_GLOBAL by Kyösti Mälkki · 11 years ago
  2. e28bd4a timestamps intel: Move timestamp scratchpad to chipset by Kyösti Mälkki · 11 years ago
  3. 24d1d4b x86: Unify arch/io.h and arch/romcc_io.h by Stefan Reinauer · 11 years ago
  4. 1bc9efa CBMEM: always initialize early if the board supports it by Stefan Reinauer · 12 years ago
  5. 9aeb694 hpet: common ACPI generation by Patrick Georgi · 12 years ago
  6. afcaac2 Drop (empty) sandybridge_late_initialization() by Stefan Reinauer · 12 years ago
  7. b405857 Remove CMOS Extended range enable from romstage by Duncan Laurie · 12 years ago
  8. 8a36634 Don't pre-enable SATA AHCI in romstage.c by Stefan Reinauer · 12 years ago
  9. 599e204 Clean up Emerald Lake 2 mainboard directory by Gabe Black · 12 years ago
  10. e6063fe Fix Sandybridge/Ivybridge mainboards according to code review by Stefan Reinauer · 12 years ago
  11. 6651da3 Add support for Intel Emerald Lake 2 CRB by Stefan Reinauer · 12 years ago