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review.coreboot.org / coreboot / 3a92be72f868249e6b0ab3853cda4c22bcf81ff2 / src / soc
  1. 3a92be7 nvidia-cbootimage: integrate into coreboot make by Isaac Christensen · 10 years ago
  2. a4a44a7 arm: Update a stale comment in bootblock .S files by David Hendricks · 11 years ago
  3. b6b1077 exynos: Install the BL1 and set the checksum in the Makefile. by Gabe Black · 11 years ago
  4. 2ceb1d8 tegra124: Switch the bootblock over the ARMv4 impelementation. by Gabe Black · 11 years ago
  5. d689324 tegra124: return the UART base address based on index by Isaac Christensen · 10 years ago
  6. 51edd54 ARM: Generalize armv7 as arm. by Gabe Black · 11 years ago
  7. ca436cb tegra124: add custom uart by Gabe Black · 11 years ago
  8. d81f409 exynos: Fix the name of the chip_operations structures. by Gabe Black · 11 years ago
  9. f09f224 arm: libpayload: Make cache invalidation take pointers instead of integers by Julius Werner · 11 years ago
  10. 7d7eedd soc/intel/baytrail/Kconfig: Remove empty line at top file by Paul Menzel · 10 years ago
  11. 7f07475 tegra124: Add a custom bootblock implementation. by Gabe Black · 11 years ago
  12. 22d0ca0 armv7: Move Exynos from 'cpu' to 'soc'. by Hung-Te Lin · 11 years ago
  13. 8b68539 ARM: Overhaul the ARM Makefile. by Gabe Black · 11 years ago
  14. 14eb43b tegra124: Implement the tegra i2c driver. by Gabe Black · 11 years ago
  15. 08d5a89 tegra124: Implement driver code for the pinmux, pingroup controls, and GPIOs. by Gabe Black · 11 years ago
  16. f40785c tegra124: Pick addresses to load the rom and ram stages. by Gabe Black · 11 years ago
  17. e97b683 tegra: Change how tegra124 and tegra include files from each other. by Gabe Black · 11 years ago
  18. b7f1bfc tegra124: fix Kconfig ARCH settings by Isaac Christensen · 10 years ago
  19. f1d6e7e Move baytrail-specific config to baytrail. by Vladimir Serbinenko · 10 years ago
  20. 3eab7ed Tegra,Tegra124: proposed layout for file hierarchy with example by Ronald G. Minnich · 11 years ago
  21. eb623ab tegra124: Implement the monotonic timer by reading the 1us timer register. by Gabe Black · 11 years ago
  22. 59ebc6e tegra124: Add stack related config options to the Kconfig. by Gabe Black · 11 years ago
  23. 7980b08 tegra124: Add some make rules which will wrap the bootblock in the BCT. by Gabe Black · 11 years ago
  24. bfca984 soc/intel/fsp_baytrail: set up for including irqroute.h twice by Martin Roth · 10 years ago
  25. 396b072 tegra124: Add a stub implementation of the tegra124 SOC. by Gabe Black · 11 years ago
  26. aaaef06 fsp_baytrail/.../gpio.h: Add GPIO_NC1 for GPIOS on func 1 by Martin Roth · 10 years ago
  27. 53847a2 src/.../Kconfig: various small fixes to texts by Daniele Forsi · 10 years ago
  28. a47ab1b soc,Makefile.inc: Trivial - drop trailing blank lines at EOF by Edward O'Callaghan · 10 years ago
  29. 398bb14 soc,ASL: Trivial - drop trailing blank lines at EOF by Edward O'Callaghan · 10 years ago
  30. 1110495 SPI: Split writes using spi_crop_chunk() by Kyösti Mälkki · 10 years ago
  31. 730e3b0 soc: Trivial - drop trailing blank lines at EOF by Edward O'Callaghan · 10 years ago
  32. 93d9f92 spi: Change spi_xfer to work in units of bytes instead of bits. by Gabe Black · 10 years ago
  33. 1e18735 spi: Remove unused parameters from spi_flash_probe and setup_spi_slave. by Gabe Black · 10 years ago
  34. e96f4b1 baytrail_fsp: Fix the mmconf Kconfig by Martin Roth · 10 years ago
  35. fbd1503 fsp_baytrail: Minor Kconfig updates by Martin Roth · 10 years ago
  36. c3ed886 intel boards: Use acpi_is_wakeup_s3() by Kyösti Mälkki · 10 years ago
  37. de38eea fsp_baytrail: Add the default FSP location by Martin Roth · 10 years ago
  38. c0602d4 fsp_baytrail: Add Baytrail B0/B1 "Super SKU" microcode by Martin Roth · 10 years ago
  39. a0b4a8d ACPI: Remove CBMEM TOC from GNVS by Kyösti Mälkki · 10 years ago
  40. 0baaa2d fsp_baytrail: remove version from default vbios path by Martin Roth · 10 years ago
  41. d866e58 fsp_baytrail: Fix CONFIG_ENABLE_FSP_FAST_BOOT by Martin Roth · 10 years ago
  42. ae6e0c6 cpu/intel/fsp_model_206ax: change realpath to readlink by Martin Roth · 10 years ago
  43. 433659a fsp_baytrail: Add the FSP version of Intel's Bay Trail-I chip by Martin Roth · 10 years ago
  44. 58f73a6 build: separate CPPFLAGS from CFLAGS by Patrick Georgi · 10 years ago
  45. 98f49d2 build: CPPFLAGS is more common than INCLUDES by Patrick Georgi · 10 years ago
  46. 9fd7c0f baytrail: Add SOC thermal settings by Duncan Laurie · 11 years ago
  47. c6313db baytrail: Enable PCIe common clock and ASPM by Duncan Laurie · 11 years ago
  48. 3549462 baytrail: enable graphics turbo by Aaron Durbin · 11 years ago
  49. 59d1d87 baytrail: use CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED by Aaron Durbin · 11 years ago
  50. 3f94a74 baytrail: Add ACPI Device for XHCI by Duncan Laurie · 11 years ago
  51. b013fff baytrail: nvm: use proper types for checking erase by Aaron Durbin · 11 years ago
  52. 931e590 baytrail: mrc_cache: check region erased before erasing by Aaron Durbin · 11 years ago
  53. 580b1ad baytrail: add C0 microcode update by Aaron Durbin · 11 years ago
  54. 107b71c baytrail: reboot with EC in S0 with no MRC cache and EC in RW by Aaron Durbin · 11 years ago
  55. b376ea6 baytrail: dptf: Add disable trip point methods by Duncan Laurie · 11 years ago
  56. a36d60a baytrail: Updates for DPTF ACPI framework by Duncan Laurie · 11 years ago
  57. 766482d baytrail: don't SMI on tco timer firing by Aaron Durbin · 11 years ago
  58. 19edc3a baytrail: clear the pmc wake status registers by Aaron Durbin · 11 years ago
  59. 8f31ecf baytrail: log reset, power, and wake events in elog by Aaron Durbin · 11 years ago
  60. 00bf3db baytrail: snapshot power state in romstage by Aaron Durbin · 11 years ago
  61. 1ea9bde baytrail: add cpuid for C0 by Aaron Durbin · 11 years ago
  62. 0039319 baytrail: align with intel recommendations by Aaron Durbin · 11 years ago
  63. 7f17759 baytrail: add way to load reference code from vboot area by Aaron Durbin · 11 years ago
  64. 2e65796 baytrail: Expose IOSF as ACPI object by Duncan Laurie · 11 years ago
  65. c29d6b8 baytrail: Put devices in ACPI mode after setup by Duncan Laurie · 11 years ago
  66. d82cade baytrail: Add header include wrapper and offset define by Duncan Laurie · 11 years ago
  67. 63fcb4a baytrail: cache reference code for S3 resume by Aaron Durbin · 11 years ago
  68. ce727e1 baytrail: allow ramstage_cache_location() usage in ramstage by Aaron Durbin · 11 years ago
  69. 7d34c60 baytrail: note S3 resume status earlier by Aaron Durbin · 11 years ago
  70. 616f394 baytrail: utilize reg_script_run_on_dev() by Aaron Durbin · 11 years ago
  71. cffe795 baytrail: initialize perf/power registers by Aaron Durbin · 11 years ago
  72. bc5b557 baytrail: add more iosf access functions by Aaron Durbin · 11 years ago
  73. 5cc3b40 baytrail: remove verbosity in iosf by Aaron Durbin · 11 years ago
  74. 430bf0d baytrail: Add support for LPSS and SCC devices in ACPI mode by Duncan Laurie · 11 years ago
  75. ad8d913 baytrail: Basic DPTF framework by Duncan Laurie · 11 years ago
  76. b40e444 baytrail: Enable panel and set timings by Duncan Laurie · 11 years ago
  77. 8b120a8 baytrail: allow SD card controller capabilities overrides by Aaron Durbin · 11 years ago
  78. 16cc9c9 baytrail: fix nvs offsets by Aaron Durbin · 11 years ago
  79. f4fe3c3 baytrail: lpe audio device needs memory for its firmware by Aaron Durbin · 11 years ago
  80. 27351b9 baytrail: gpio: Make GPIO inputs MMIO by default by Shawn Nematbakhsh · 11 years ago
  81. 4334c87 baytrail: enable lpe resources assigned to device by Aaron Durbin · 11 years ago
  82. b50566e baytrail: Fix _CRS to build with new IASL by Duncan Laurie · 11 years ago
  83. 8cbf47f baytrail: add lpe codec clock configuration by Aaron Durbin · 11 years ago
  84. bb0d1ea baytrail: Add ACPI code to describe GPIO controller by Duncan Laurie · 11 years ago
  85. 22f1dcd baytrail: Update to microcode 31E and fix C-state table by Duncan Laurie · 11 years ago
  86. 5b33dc1 baytrail: minor style by Patrick Georgi · 10 years ago
  87. 13d9341 baytrail: romstage: Add config option to enable RMT by Shawn Nematbakhsh · 11 years ago
  88. ae31f7d baytrail: pcie: Root port initialization by Aaron Durbin · 11 years ago
  89. 5f5cd72 baytrail: gpio: Fix NCORE gpio-to-pad LUT by Shawn Nematbakhsh · 11 years ago
  90. 6f9947a baytrail: enable caching and prefetching in spi controller by Aaron Durbin · 11 years ago
  91. bd4ea8c baytrail: fix direct irq pad configuration by Aaron Durbin · 11 years ago
  92. ebf7ec5 baytrail: ensure init_chromeos() is called in romstage by Aaron Durbin · 11 years ago
  93. 99d8818 baytrail: don't allow PCIE wake ups by Aaron Durbin · 11 years ago
  94. 281abfb baytrail: gpio: Make pad input/output state mutually exclusive by Shawn Nematbakhsh · 11 years ago
  95. dc866cf baytrail: first pass at lpss device initialization by Aaron Durbin · 11 years ago
  96. 1592169 baytrail: initialize eMMC device by Aaron Durbin · 11 years ago
  97. c626b74 baytrail: initialize common SSC functionality by Aaron Durbin · 11 years ago
  98. d7f0f3d baytrail: add score and ssc iosf access functions by Aaron Durbin · 11 years ago
  99. 99ac98f Introduce stage-specific architecture for coreboot by Furquan Shaikh · 10 years ago
  100. fb494d6 baytrail: gpio: Add support for direct / dedicated IRQs by Shawn Nematbakhsh · 11 years ago