Gitiles
Code Review Sign In
review.coreboot.org / coreboot / 36fcc85be459ec175c7f4be08db7ae9708f01b5d / src / northbridge / intel / gm45 / raminit_read_write_training.c
  1. 13f6650 device/mmio.h: Add include file for MMIO ops by Kyösti Mälkki · 5 years ago
  2. 0624f92 nb/intel/gm45: Hide some output behind DEBUG_RAM_SETUP by Nico Huber · 7 years ago
  3. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  4. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  5. bde6d30 x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer by Kevin Paul Herbert · 10 years ago
  6. 393619b intel/gm45: Add more debug output to read/write training by Nico Huber · 11 years ago
  7. 12276ac intel/gm45: Handle overflows during DDR3 write training by Nico Huber · 11 years ago
  8. 08bee23 intel/gm45: Refactor DDR3 write training by Nico Huber · 11 years ago
  9. 35e45c0 intel/gm45: Handle overflows during DDR3 read training by Nico Huber · 11 years ago
  10. 26a6435 intel/gm45: Refactor DDR3 read training by Nico Huber · 11 years ago
  11. a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 11 years ago
  12. 2efc880 intel/gm45: new northbridge by Patrick Georgi · 12 years ago