Gitiles
Code Review Sign In
review.coreboot.org / coreboot / 36d405268f040208cd26902f3c0b5346f7d4d25b / src / cpu
  1. cbe7464c src/cpu: Add required space before opening parenthesis '(' by Elyes HAOUAS · 7 years ago
  2. 7c8d74c src/cpu: Remove unnecessary whitespace before "\n" by Elyes HAOUAS · 7 years ago
  3. d6e9686 src/cpu: Capitalize CPU, APIC and IOAPIC typo fix by Elyes HAOUAS · 7 years ago
  4. 08e842c Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUS by Aaron Durbin · 7 years ago
  5. 4a36c4e Kconfig: lay groundwork for not assuming SPI flash boot device by Aaron Durbin · 7 years ago
  6. 289f057 cpu/ti/am355x: Fix array overrun by Paul Menzel · 7 years ago
  7. 0cd338e Remove non-ascii & unprintable characters by Martin Roth · 7 years ago
  8. d82be92 src/cpu: Capitalize CPU by Elyes HAOUAS · 7 years ago
  9. 585d1a0 src/cpu: Capitalize ROM and RAM by Elyes HAOUAS · 7 years ago
  10. ae738ac cpu/x86: Support CPUs without rdmsr/wrmsr instructions by Lee Leahy · 7 years ago
  11. dc4820b intel car: Use MTRR WRPROT type for XIP cache by Kyösti Mälkki · 7 years ago
  12. 9551bed intel sandy/ivy: Redefine DCACHE_RAM_SIZE and DCACHE_RAM_MRC_VAR_SIZE by Kyösti Mälkki · 7 years ago
  13. e9a9c6a intel/haswell: Remove useless MTRR clear by Kyösti Mälkki · 7 years ago
  14. 3f22abb intel/haswell post-car: Minor fix on MTRR setting by Kyösti Mälkki · 7 years ago
  15. b37d01d3 intel/haswell: Add asmlinkage for romstage_after_car() by Kyösti Mälkki · 7 years ago
  16. a38677b cpu/x86/mtrr: correct variable MTRR calculation around 1MiB boundary by Aaron Durbin · 7 years ago
  17. 8a2f167 intel car: Unify postcodes by Kyösti Mälkki · 7 years ago
  18. eb61ea8 intel car: Unify whitespace and comment fixes by Kyösti Mälkki · 7 years ago
  19. 9ec6914 intel car: Remove guard on XIP_ROM_SIZE by Kyösti Mälkki · 7 years ago
  20. a27fba6 intel model_106cx: Include CAR from socket directory by Kyösti Mälkki · 7 years ago
  21. a877b74 AMD k8 fam10: Fix CAR GLOBALS late in romstage by Kyösti Mälkki · 7 years ago
  22. cbb23af AMD binaryPI: Use common romstage ram stack by Kyösti Mälkki · 7 years ago
  23. f32d5b8 AMD binaryPI: Split romstage ram stack by Kyösti Mälkki · 7 years ago
  24. bd274e1 AMD binaryPI: Use common ACPI S3 recovery by Kyösti Mälkki · 7 years ago
  25. bce9bbd AGESA: Use common romstage ram stack by Kyösti Mälkki · 7 years ago
  26. a2a7e98 AGESA: Use common ACPI S3 recovery by Kyösti Mälkki · 7 years ago
  27. e5c00a5 intel post-car: Consolidate choose_top_of_stack() by Kyösti Mälkki · 7 years ago
  28. 70cd543 AMD k8 fam10: Drop excessive spinlock initialization by Kyösti Mälkki · 7 years ago
  29. d113190 AMD k8 fam10: Fix romstage handoff by Kyösti Mälkki · 7 years ago
  30. c30bfca AMD k8 fam10: Refactor S3 recovery by Kyösti Mälkki · 7 years ago
  31. 1891bfd intel/haswell: No need for ACPI S3 resume backup by Kyösti Mälkki · 7 years ago
  32. 65e8f64 intel romstage: Use run_ramstage() by Kyösti Mälkki · 7 years ago
  33. e5f48d2 region: Add writeat and eraseat support by Antonello Dettori · 7 years ago
  34. cf0e60f ACPI S3: Add common recovery code by Kyösti Mälkki · 7 years ago
  35. a16cd9c ACPI S3: Move SMP trampoline recovery by Kyösti Mälkki · 7 years ago
  36. 65cc526 Ignore RAMTOP for MTRRs by Kyösti Mälkki · 7 years ago
  37. 75d139b intel/model_206ax: Prepare for dynamic CONFIG_RAMTOP by Kyösti Mälkki · 7 years ago
  38. 8431fcb intel/model_2065x: Prepare for dynamic CONFIG_RAMTOP by Kyösti Mälkki · 7 years ago
  39. b4f827d intel cache-as-ram: Fix comment about MTRRs by Kyösti Mälkki · 7 years ago
  40. 15fa992 intel/model_6ex: Prepare for dynamic CONFIG_RAMTOP by Kyösti Mälkki · 7 years ago
  41. 408d392 intel/car/cache_as_ram_ht.inc: Prepare for dynamic CONFIG_RAMTOP by Kyösti Mälkki · 7 years ago
  42. 07921540d intel/car/cache_as_ram.inc: Prepare for dynamic CONFIG_RAMTOP by Kyösti Mälkki · 7 years ago
  43. 4089a17 amd/fam_10h-fam_15h: allow building without microcode updates by Arthur Heymans · 7 years ago
  44. e6bab8f amd/geode: Fix comment about ACPI S3 by Kyösti Mälkki · 7 years ago
  45. d71cfd2 VIA C7 NANO: Fix early MTRR setting by Kyösti Mälkki · 7 years ago
  46. e325b22 intel: Fix romstage main() with asmlinkage by Kyösti Mälkki · 7 years ago
  47. 831a7ef intel/cache_as_ram_ht.inc: Fix include by Kyösti Mälkki · 7 years ago
  48. 9d2762c intel cache_as_ram: Fix typo in comment by Kyösti Mälkki · 7 years ago
  49. d72cc41 intel/model_206ax: Move platform specific defines by Kyösti Mälkki · 7 years ago
  50. a969ed3 Move definitions of HIGH_MEMORY_SAVE by Kyösti Mälkki · 7 years ago
  51. 465eff6 Fix some cbmem.h includes by Kyösti Mälkki · 7 years ago
  52. 08311f5 AGESA vendorcode: Build a common amdlib by Kyösti Mälkki · 7 years ago
  53. 4bab6e7 intel/sch: Merge northbridge and southbridge in src/soc by Stefan Reinauer · 7 years ago
  54. 898c47c AGESA f12: Build as libagesa.a by Kyösti Mälkki · 7 years ago
  55. 788e736 AGESA f16kb: Build as libagesa.a by Kyösti Mälkki · 7 years ago
  56. 6ec72c9 drivers/uart: Use uart_platform_refclk for all UART models by Lee Leahy · 7 years ago
  57. ef10529 cpu/x86: don't treat all chipsets the same regarding XIP_ROM_SIZE by Aaron Durbin · 7 years ago
  58. 6366d92 {cpu,soc}/intel: remove unused smm_init() function by Aaron Durbin · 7 years ago
  59. 770d7c7 cpu/x86/mp_init: reduce exposure of internal implementation by Aaron Durbin · 7 years ago
  60. 463af33 cpu/intel/haswell: convert to using common MP and SMM init by Aaron Durbin · 7 years ago
  61. 8250192 cpu/x86: combine multiprocessor and SMM initialization by Aaron Durbin · 7 years ago
  62. d87c7bc cpu/x86: remove BACKUP_DEFAULT_SMM_REGION option by Aaron Durbin · 7 years ago
  63. a41e030 cpu/x86/smm_module_loader: always build with SMM module support by Aaron Durbin · 7 years ago
  64. 0e55632 cpu/x86/mp_init: remove unused callback arguments by Aaron Durbin · 7 years ago
  65. 0c85b7f soc/intel/apollolake: Add cache for BIOS ROM by Andrey Petrov · 7 years ago
  66. 064a501 cpu/x86/tsc: Compile TSC timer for postcar as well by Andrey Petrov · 7 years ago
  67. b8671ea cpu/x86/tsc: remove conditional compilation by Aaron Durbin · 7 years ago
  68. 01dfdc5 cpu/x86/tsc: compile same code for all stages by Aaron Durbin · 7 years ago
  69. 711bfa9 cpu/x86/tsc: prepare for CAR_GLOBAL in delay_tsc.c by Aaron Durbin · 7 years ago
  70. 6f3a55a src/cpu/x86: remove TSC_CALIBRATE_WITH_IO by Aaron Durbin · 7 years ago
  71. eee6a7f am335x: Add some code for manipulating GPIOs by Gabe Black · 10 years ago
  72. 8f251d9 am335x: Add data structures for the clock module registers by Gabe Black · 10 years ago
  73. e35db2c src/: Fix lint style-labels warnings by Martin Roth · 8 years ago
  74. 7f8afe0 arch/x86: introduce postcar stage/phase by Aaron Durbin · 8 years ago
  75. 331ac1b mtrr: Define a function for obtaining free var mtrr by Furquan Shaikh · 8 years ago
  76. b4e5c5eb cpu/x86: compile earlymtrr.c code for romstage as well by Andrey Petrov · 8 years ago
  77. 5fa5da1 cpu/x86/mtrr: remove early_mtrr_* functions by Aaron Durbin · 8 years ago
  78. 264bf0b cpu/x86/mtrr: move cache_ramstage() to its only user by Aaron Durbin · 8 years ago
  79. 7e3903b cpu/via/c7: Don't manually include udelay_io.c by Stefan Reinauer · 8 years ago
  80. 3d840d0 northbridge/intel/i440bx: Unify UDELAY selection by Stefan Reinauer · 8 years ago
  81. 2a08137 x86 chipsets: utilize x86_setup_mtrrs_with_detect() by Aaron Durbin · 8 years ago
  82. 41aa8bc Kconfig: Remove unneeded UDELAY_IO redeclaration by Stefan Reinauer · 8 years ago
  83. e63be89 cpu/x86/mtrr: add helper function to detect variable MTRRs by Aaron Durbin · 8 years ago
  84. 9d5e36e cpu/x86: Sort some Kconfig options by Stefan Reinauer · 8 years ago
  85. dd56de9 arch/x86: document CAR symbols and expose them in symbols.h by Andrey Petrov · 8 years ago
  86. 8198c67 arch/x86: always use _start as entry symbol for all stages by Aaron Durbin · 8 years ago
  87. 4330a9c arch/x86: rename reset_vector -> _start by Aaron Durbin · 8 years ago
  88. f8468d4 cpu/x86/16bit: rename _start -> _start16bit by Aaron Durbin · 8 years ago
  89. 0fd068b cpu/x86/16bit/reset16: mark reset vector executable by Aaron Durbin · 8 years ago
  90. 998d856 cpu/x86/16bit/reset16: remove stale 32-bit jump by Aaron Durbin · 8 years ago
  91. 0e92bb0 tree wide: Convert "if (CONFIG_.*_TPM.*)" to "if (IS_ENABLED(...))" by Denis 'GNUtoo' Carikli · 8 years ago
  92. 55fdfca cpu/qemu-power8: don't enable it for qemu-x86 by Patrick Georgi · 8 years ago
  93. deba4e8 power8: qemu "cpu" by Ronald G. Minnich · 8 years ago
  94. ffc31d0 cpu/amd: Add socket FM2 by Damien Zammit · 8 years ago
  95. bedbd67 cpu/amd: Update/Add license headers by Damien Roth · 8 years ago
  96. 07a196e CPU/intel: Add missing license headers by Damien Roth · 8 years ago
  97. 37a54b7 cpu/allwinner: Update license headers by Damien Roth · 8 years ago
  98. 144eea0 Make MRC vs native a config rather than making a separate chipset for it. by Vladimir Serbinenko · 8 years ago
  99. 0492c8c cpu/x86/tsc: Compile delay_tsc.c for the bootblock as well by Alexandru Gagniuc · 8 years ago
  100. a02bb65 cpu/intel/microcode: allow microcode to be loaded in romstage by Aaron Durbin · 8 years ago