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review.coreboot.org / coreboot / 35dc00f75b3345fda78df56fe29495eb5fdf5827 / src / soc / intel / broadwell / lpc.c
  1. 35dc00f broadwell: Preserve VbNv around cmos_init by Duncan Laurie · 10 years ago
  2. 4ee4bd5 broadwell: Change all SoC headers to <soc/headername.h> system by Julius Werner · 10 years ago
  3. 074a028 Samus: Synchronization with FRC to enable PCIe Relaxed Order. by Kenji Chen · 10 years ago
  4. 472d0cb broadwell: fixed power gating enable for disabled sata port by Kane Chen · 10 years ago
  5. 446fb8e broadwell: Misc updates from 2.1.0 ref code by Duncan Laurie · 10 years ago
  6. 9e94dbf ACPI: Get S3 resume state from romstage_handoff by Kyösti Mälkki · 10 years ago
  7. bde6d30 x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer by Kevin Paul Herbert · 10 years ago
  8. de7ed6f intel/broadwell: Spelling fixes by Martin Roth · 10 years ago
  9. b219da8 broadwell: move to per-device ACPI. by Vladimir Serbinenko · 10 years ago
  10. c88c54c broadwell: add new intel SOC by Duncan Laurie · 10 years ago