Gitiles
Code Review
Sign In
review.coreboot.org
/
coreboot
/
32d2e2b3608006b615521eb68f011aa72f44171e
/
src
/
southbridge
/
intel
/
lynxpoint
/
usb_xhci.c
32d2e2b
intel/lynxpoint: Work around XHCI resume issues
by Duncan Laurie
· 11 years ago
16a0f5c
intel/lynxpoint: xhci: Revert suspend/resume changes
by Duncan Laurie
· 11 years ago
88c873a
intel/lynxpoint: xhci: Port reset changes on suspend/resume
by Duncan Laurie
· 11 years ago
527b03a
intel/lynxpoint: xhci: Update magic bits to new magic values
by Duncan Laurie
· 11 years ago
c3ed886
intel boards: Use acpi_is_wakeup_s3()
by Kyösti Mälkki
· 10 years ago
0bf1dea
lynxpoint: Fix an issue clearing port change status bits
by Duncan Laurie
· 11 years ago
0dcb577
lynxpoint: Fix issues with XHCI init
by Duncan Laurie
· 11 years ago
911cedf
lynxpoint: Route all USB ports to XHCI in finalize step
by Duncan Laurie
· 11 years ago
1f52908
lynxpoint: Move USB SMI sleep code to separate USB files
by Duncan Laurie
· 11 years ago
2d9d39a
lynxpoint: Enable USB clock gating, late setup, and sleep prep
by Duncan Laurie
· 11 years ago