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review.coreboot.org / coreboot / 3106d0ffce85fe07feefb5c488802aab8e9b42f6 / src / northbridge
  1. 3106d0f haswell: Misc updates from 1.6.1 ref code by Duncan Laurie · 11 years ago
  2. 727b545 Add a specific post code for S3 resume failures by Duncan Laurie · 11 years ago
  3. 289bac6 haswell: Add pei_data field for USB routing by Duncan Laurie · 11 years ago
  4. 0a7c49e HDA: Enable Mini-HDA and fix up PCH-HDA init by Duncan Laurie · 11 years ago
  5. 356833d haswell: Fix up GPU power management setup by Duncan Laurie · 11 years ago
  6. 118d105 haswell: Export functions for CPU family+model and stepping by Duncan Laurie · 11 years ago
  7. b171179 haswell: Add ACPI support for Controllable TDP by Duncan Laurie · 11 years ago
  8. c70353f haswell: Misc power management setup and fixes by Duncan Laurie · 11 years ago
  9. 8c0cb8a Correct file permissions. by Idwer Vollering · 11 years ago
  10. 5bcca7e haswell: pull in the init code for FUI by Ronald G. Minnich · 11 years ago
  11. 54b8e7a Add Intel FSP northbridge support Sandybridge and Ivybridge by Marc Jones · 11 years ago
  12. 72dccce global: Fix usage of get_option() to make use of CB_CMOS_ codes by Alexandru Gagniuc · 11 years ago
  13. bcfcfa4 haswell: Update pei_data to match ref code by Duncan Laurie · 11 years ago
  14. 932fbd6 Add DDR refresh config to pei data structure. by Shawn Nematbakhsh · 11 years ago
  15. bd7e8d8 AMD Northbridge LX: simplify get_top_of_ram() by Christian Gmeiner · 11 years ago
  16. c7f2ab7 haswell: Add magic to turn on grahpics in normal mode by Duncan Laurie · 11 years ago
  17. b1c25e7 haswell: update pei_data data structure by Aaron Durbin · 11 years ago
  18. c6f6be0 Support for nehalem northbridge by Vladimir Serbinenko · 11 years ago
  19. 990555b haswell: Update GT PM register value by Duncan Laurie · 11 years ago
  20. c6f0997 Northbridge: i945: Native VGA init: print the GMA and GTT addresses by Peter Stuge · 11 years ago
  21. 03e4ac6 Northbridge: i945: Native VGA init: use UMA address by Peter Stuge · 11 years ago
  22. 2186b65 lenovo/x60: native vga init: fix code style issues. by Denis 'GNUtoo' Carikli · 11 years ago
  23. 0ce5ebf northbridge/intel/i945/raminit.c: Remove set but unused variable `reg16` by Paul Menzel · 11 years ago
  24. 697927c CBMEM: Define cbmem_top() just once for x86 by Kyösti Mälkki · 11 years ago
  25. f8bf5a1 Revert "CBMEM: Always have early initialisation" by Kyösti Mälkki · 11 years ago
  26. 7a00ca7 northbridge/amd/amdk8/raminit_f_dqs.c: Remove unused variable `reg` in `setup_mtrr_dqs()` by Paul Menzel · 11 years ago
  27. fd4f413 Rename cpu/x86/car.h to arch/early_variables.h by Stefan Reinauer · 11 years ago
  28. 5a7e127 southbridge/cimx/sb900: Rename headers to match sb700 & sb800 by Corey Osgood · 11 years ago
  29. de1fe7f CBMEM: Always have early initialisation by Kyösti Mälkki · 11 years ago
  30. c0beb6d timestamps epia-m850: Cleanup without enabling timestamps by Kyösti Mälkki · 11 years ago
  31. f9f74af CBMEM x86: Unify get_cbmem_toc() by Kyösti Mälkki · 11 years ago
  32. dcb688e CBMEM: Unify get_top_of_ram() by Kyösti Mälkki · 11 years ago
  33. 42f4651 CBMEM northbridges: Remove references to global high_tables_base by Kyösti Mälkki · 11 years ago
  34. 2b790f6 CBMEM AMD: Fix calls to set_top_of_ram_once() by Kyösti Mälkki · 11 years ago
  35. e7e847c CBMEM AMD: Remove references to global high_tables_base by Kyösti Mälkki · 11 years ago
  36. 6f9fa86 intel/i5000: remove explicit pcie config accesses by Kyösti Mälkki · 11 years ago
  37. 8aa7e83 intel/i945 intel/i82801gx: remove explicit pcie config accesses by Kyösti Mälkki · 11 years ago
  38. 35a7249 intel/gm45: Use MMCONF_SUPPORT_DEFAULT by Kyösti Mälkki · 11 years ago
  39. 3c46ca3 Sandybridge/Ivybridge: Unify and fix Kconfig defaults by Stefan Reinauer · 11 years ago
  40. 3f9a62e Add pci_devfn_t and use with __SIMPLE_DEVICE__ by Kyösti Mälkki · 11 years ago
  41. 4159a80 Correct spelling of shadow, setting and memory by Paul Menzel · 11 years ago
  42. 42e11f5 AMD Richland: Add new graphics device IDs to Family 15, Models 10-1F by Bruce Griffith · 11 years ago
  43. ac90d80 AMD Kabini: Split DSDT into common sections by Mike Loptien · 11 years ago
  44. fd98c65 intel/sandybridge intel/bd82x6x: remove explicit pcie config accesses by Kyösti Mälkki · 11 years ago
  45. 0cc33da ASUS F2A85-M: Split DSDT into common sections (as per Parmer) by Kimarie Hoot · 11 years ago
  46. 76db07e AMD Kabini: Add map_oprom() function for Vendor/Device IDs by Bruce Griffith · 11 years ago
  47. 3e32cc0 AMD Kabini: Add northbridge AGESA wrapper (new AMD processor) by Siyuan Wang · 11 years ago
  48. ef84401 Add directive __SIMPLE_DEVICE__ by Kyösti Mälkki · 11 years ago
  49. 0aede11 Drop unused EXTERNAL_MRC_BLOB by Stefan Reinauer · 11 years ago
  50. bf0988b AMD Fam15tn: Split DSDT into common sections by Steve Goodrich · 11 years ago
  51. 33e5df3 Set PCI bus operations at buildtime for ramstage by Kyösti Mälkki · 11 years ago
  52. 9e7806a usbdebug: Move ehci_debug_info allocation by Kyösti Mälkki · 11 years ago
  53. 6adef08 Rename hardwaremain() to main() by Stefan Reinauer · 11 years ago
  54. 78c3e33 FUI: reorganize include files by Ronald G. Minnich · 11 years ago
  55. 54d6abd Drop some duplicates of PCI-e config functions by Kyösti Mälkki · 11 years ago
  56. 872c922 Fix MMCONF_SUPPORT_DEFAULT for ramstage by Kyösti Mälkki · 11 years ago
  57. 4f78b18 fox_wtm2: First step support for coreboot-based graphics startup by Ronald G. Minnich · 11 years ago
  58. 2a66d6b FOX_WTM2: First pass at FUI. by Ronald G. Minnich · 11 years ago
  59. 9e97423 intel/i5000: Use MMCONF_SUPPORT_DEFAULT by Kyösti Mälkki · 11 years ago
  60. 575e681 Move select MMCONF_SUPPORT under northbridge (fix) by Kyösti Mälkki · 11 years ago
  61. 032c23d intel/i945: Use MMCONF_SUPPORT_DEFAULT by Kyösti Mälkki · 11 years ago
  62. fbdb085 intel/sandybridge intel/ivybridge: Use MMCONF_SUPPORT_DEFAULT by Kyösti Mälkki · 11 years ago
  63. 15c4ab7 Move select MMCONF_SUPPORT under northbridge by Kyösti Mälkki · 11 years ago
  64. abe6847 Intel GM45, 945, Sandy Bridge: Unify `delay.c` and `udelay.c` by Paul Menzel · 11 years ago
  65. 59158b2 Make setting MAX_PIRQ_LINKs depend on NORTHBRIDGE_VIA_VX900 by Dave Frodin · 11 years ago
  66. 53abac1 amd/cimx/rd890/amd.h: Eliminate redefinition of NULL by Bruce Griffith · 11 years ago
  67. 58fff9d amd/agesa/family15/northbridge.c: Delete unused variable by Bruce Griffith · 11 years ago
  68. 1cc3416 Add support to enable/disable builtin GbE (again) by Stefan Reinauer · 11 years ago
  69. 714212a Revert "Add support to enable/disable builtin GbE" by Kyösti Mälkki · 11 years ago
  70. 8b9d4f3 Vortex86EX northbridge.c : Remove Vortex86DX PCI N/B related code. by Andrew Wu · 11 years ago
  71. 59fb82a intel/sch: Use MMCONF_BASE_ADDRESS by Kyösti Mälkki · 11 years ago
  72. 6aeb4a2 AMD: Drop empty root_complex by Kyösti Mälkki · 11 years ago
  73. 5ce0506 AMD Fam15tn: Add support for AGESA runtime allocation in CBMEM by Rudolf Marek · 11 years ago
  74. 88ebbeb AMD Fam15tn: Add IOMMU BAR allocation to northbridge by Rudolf Marek · 11 years ago
  75. eac00d2 intel/sandybridge: Locate CBMEM TOC early in ramstage by Kyösti Mälkki · 11 years ago
  76. 0651072 Add support for DMP Vortex86EX PCI northbridge. by Andrew Wu · 11 years ago
  77. d358a50 Add support to enable/disable builtin GbE by Stefan Reinauer · 11 years ago
  78. 483ff82 sandybridge: Store MRC cache in CBFS by Patrick Georgi · 11 years ago
  79. 59d0d15 AMD: Kconfig cleanup by Kyösti Mälkki · 11 years ago
  80. 560433b VX900: Use MIN/MAX from stdlib.h instead of redefining them by Alexandru Gagniuc · 11 years ago
  81. 23211b0 VIA VX900: Add minimal ramstage needed to boot linux by Alexandru Gagniuc · 11 years ago
  82. 7d31e7c VX900: Add DDR3 initialization by Alexandru Gagniuc · 11 years ago
  83. 88a3023 VX900: Add support for early romstage by Alexandru Gagniuc · 11 years ago
  84. 7ed7394 i945: Add Display defines for int15h handler. by Denis 'GNUtoo' Carikli · 11 years ago
  85. fd39ddd Intel 945: Select LAPIC_MONOTONIC_TIMER for X86EMU_DEBUG_TIMINGS by Denis 'GNUtoo' Carikli · 11 years ago
  86. a296ce7 Move the MARK_GRAPHICS_MEM_WRCOMB to x86 architecture by Ronald G. Minnich · 11 years ago
  87. 7bc35754 AMD Northbridge LX: get rid of #include "northbridge/amd/lx/raminit.c" by Christian Gmeiner · 11 years ago
  88. c4e07bb AMD Northbridge LX: convert spd_read_byte() to non-static version by Christian Gmeiner · 11 years ago
  89. e2dc80c AMD Northbridge LX: rename get_systop() to get_top_of_ram() by Christian Gmeiner · 11 years ago
  90. 84ae76c AMD Northbridge LX: include northbridge.h in raminit.c by Christian Gmeiner · 11 years ago
  91. 194ec4d AMD Northbridge LX: make GeodeLinkSpeed() function prototype non-static by Christian Gmeiner · 11 years ago
  92. 6f9f785 AMD Northbridge LX: add some missing includes by Christian Gmeiner · 11 years ago
  93. eb6322f AMD Northbridge LX: make sdram_* function prototypes non-static by Christian Gmeiner · 11 years ago
  94. 29840e2 AMD Fam 15tn: Use all memory on systems with more than 4 GB by Siyuan Wang · 11 years ago
  95. 27435d3 haswell: fix overflow handling TOUUD by Aaron Durbin · 11 years ago
  96. 42409e8 northbridge/amd/amdmct: Use `static const` instead of `const static` by Paul Menzel · 11 years ago
  97. 5750fdd Intel GM45, 945, SNB: Move `multiply_to_tsc()` to `tsc.h` by Ronald G. Minnich · 11 years ago
  98. 51837f9 Intel Sandy Bridge: udelay.c: Change comparison from <= to < by Paul Menzel · 11 years ago
  99. 393619b intel/gm45: Add more debug output to read/write training by Nico Huber · 11 years ago
  100. 12276ac intel/gm45: Handle overflows during DDR3 write training by Nico Huber · 11 years ago