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coreboot
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302951d9c3eb812a42cb6560a5d2b0096fbe85d5
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src
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mainboard
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pcengines
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apu2
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variants
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apu5
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devicetree.cb
302951d
mb/pcengines/*: enable simple IO-based GPIO control
by Piotr Kleinschmidt
· 4 years, 7 months ago
4dba497
binaryPI: Drop nested northbridge in devicetree
by Kyösti Mälkki
· 6 years ago
694d18a
pcengines/apu2: enable IOMMU for all apu2 variants
by Piotr Król
· 6 years ago
70b9245
mainboard/pcengines/apu2: add apu3 and apu5 variants
by Kamil Wcislo
· 7 years ago