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review.coreboot.org / coreboot / 2fb6f68ef09358aa6f2550519e71a1d74702d5ef / src / mainboard / asus / p5gc-mx / devicetree.cb
  1. 4276050 mb/*/*/devicetree.cb: Normalize disabled PIRQ values by Angel Pons · 4 years, 1 month ago
  2. b3162b5 mainboard/*/*/*.cb: Remove leading blank lines from SPDX header by Elyes HAOUAS · 4 years, 3 months ago
  3. 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 3 months ago
  4. c49d7a3 src/: Replace GPL boilerplate with SPDX headers by Patrick Georgi · 4 years, 3 months ago
  5. 3b618bb mainboard/[a-f]*: Remove copyright notices by Patrick Georgi · 4 years, 5 months ago
  6. fecf777 sb/intel/i82801gx: Add common LPC decode code by Arthur Heymans · 4 years, 9 months ago
  7. ae31769 mb/,sb/intel/i82801gx: Merge `ide_legacy_combined` into `sata_mode` by Nico Huber · 5 years ago 4.10
  8. 5eb81be sb/intel/i82801gx: Detect if the southbridge supports AHCI by Arthur Heymans · 6 years ago
  9. fbf380a mb/*/devicetree.cb: Remove unavailable PCIe ports by Arthur Heymans · 6 years ago
  10. b9d2589 mb/*/*: Harmonise FD and devicetree on boards featuring ICH7 by Arthur Heymans · 6 years ago
  11. 4231568 mb/asus/p5gc-mx: Implement resume from S3 support by Arthur Heymans · 7 years ago
  12. 9677fbf mb/asus/p5gc-mx: Fix and complete SIO devicetree options by Arthur Heymans · 8 years ago
  13. 6390e52 mb/asus/p5gc-mx: Add mainboard by Arthur Heymans · 8 years ago