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review.coreboot.org / coreboot / 27d6299d51744bda549b7764b8fde909ad812e33 / src / southbridge / amd / pi / hudson / amd_pci_int_defs.h
  1. 70d1c72 sb/amd/pi/hudson: remove unused Bolton PI FCH code by Felix Held · 3 years, 4 months ago
  2. 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 3 months ago
  3. 182dbde src/southbridge: Use SPDX for GPL-2.0-only files by Angel Pons · 4 years, 5 months ago
  4. f3f36fa src (minus soc and mainboard): Remove copyright notices by Patrick Georgi · 4 years, 5 months ago
  5. cd49cce coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) by Julius Werner · 5 years ago
  6. b0f1988 src: Get rid of unneeded whitespace by Elyes HAOUAS · 6 years ago
  7. 839d68f AMD Bettong: refactor PCI interrupt table by WANG Siyuan · 9 years ago
  8. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  9. f2dfef0 southbridge/amd/pi: Add support for new AMD southbridge Kern by WANG Siyuan · 9 years ago
  10. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  11. 9cfa742 southbridge/amd/pi: Add the bolton definitions by Dave Frodin · 10 years ago
  12. bc21a41 southbridge/amd/pi: Rename Avalon to Hudson by Dave Frodin · 10 years ago[Renamed from src/southbridge/amd/pi/avalon/amd_pci_int_defs.h]
  13. e8b4da2 AMD: Isolate AGESA and PI build environments for southbridge by Kyösti Mälkki · 10 years ago