- 4703edc {mb, soc}: Move mrc_cache invalidating logic into `memory` common code by Subrata Banik · 2 years, 5 months ago
- 47b836a soc/intel/common: Pass `FSPM_UPD *` argument for spd functions by Subrata Banik · 2 years, 5 months ago
- 2eb51aa {mb, soc}: Change `memcfg_init()` and `variant_memory_init()` prototype by Subrata Banik · 2 years, 5 months ago
- b8b4096 mb, soc: Add the SPD_CACHE_ENABLE by Zhuohao Lee · 2 years, 7 months ago
- b438959 soc/intel/alderlake: Make clang static assert happy by Arthur Heymans · 2 years, 6 months ago
- 577afe6 vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2511_04 by Nick Vaccaro · 2 years, 7 months ago
- 91a1276 soc/intel/alderlake: Implement WA for DDR5 DIMM modules by Meera Ravindranath · 3 years, 6 months ago
- 64b1352 soc/intel/alderlake: Update meminit code due to upd changes FSP 2147 onwards by Bora Guvendik · 3 years, 3 months ago
- c4813ea vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2162_00 by Ronak Kanabar · 3 years, 3 months ago
- 91b2024 soc/intel/adl: Allow mainboard to fill CmdMirror and DqDqsRetraining by Maulik V Vaghela · 3 years, 6 months ago
- efe858b soc/intel/alderlake: Add provision to override Rcomp settings by Subrata Banik · 3 years, 5 months ago
- c8ac8f5 soc/intel/alderlake: Align RcompResistor definition as per MRC by Subrata Banik · 3 years, 5 months ago
- a1c247b soc/intel/adl and mb/intel/adlrvp: Use the newly added meminit block driver by Furquan Shaikh · 3 years, 8 months ago
- 95ee599 soc/intel/alderlake: Add lp5_ccc_config to the board memory configuration by Sridhar Siricilla · 3 years, 9 months ago
- b544fe4 mb/intel/adlrvp: Add dq_pins_interleaved into 'struct mb_cfg' by Subrata Banik · 3 years, 10 months ago
- 292afef soc/intel/alderlake/romstage: Do initial SoC commit till romstage by Subrata Banik · 4 years ago