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review.coreboot.org / coreboot / 250dfc025613f5e193183f9520432207f4b296e4 / src / soc / intel / cannonlake / romstage / fsp_params.c
  1. 250dfc0 soc/intel/cannonlake: Configure Vmx support using Kconfig by Ronak Kanabar · 5 years ago
  2. 41dad28 soc/intel/cannonlake: Enable coreboot MP PPI service for WHL/CML by Subrata Banik · 5 years ago
  3. 68890b9 soc/intel/cannonlake: Update CPU Ratio base on MSR by Lijian Zhao · 5 years ago
  4. cf32fd1 soc/intel/common: Remove common chip config use_fsp_mp_init by Subrata Banik · 6 years ago
  5. bfe4a59 soc/intel/cannonlake: Pass coreboot debug interface info to FSP by Maulik V Vaghela · 5 years ago
  6. cd49cce coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) by Julius Werner · 5 years ago
  7. 6527b1a soc/intel/cannonlake: Add Whiskeylake SoC kconfig by Subrata Banik · 6 years ago
  8. 52b5b58 soc/intel/cannonlake: Disable CpuRatio and SaGv in recovery by Duncan Laurie · 6 years ago
  9. 0bc3e3d soc/intel/cannonlake: Enable/Disable IPU based on devicetree switch by V Sowmya · 6 years ago
  10. 3ef7449 soc/intel/cannonlake: Auto turn on HDA controller by Lijian Zhao · 6 years ago
  11. fd02ff0 soc/intel/cannonlake: Enable CPU flexible ratio by Lijian Zhao · 6 years ago
  12. 25b387a soc/intel/cannonlake: Remove SmbusEnable by Duncan Laurie · 6 years ago
  13. fe701ee soc/intel/cannonlake: Enable ISH from device by Lijian Zhao · 6 years ago
  14. 521e48c soc/intel/cannonlake: Add CNP PCH-H gpio pin definitions by praveen hodagatta pranesh · 6 years ago
  15. e26c4a4 soc/intel/cannonlake: Add new cannon lake PCH-H support by praveen hodagatta pranesh · 6 years ago
  16. 742c6fe soc/intel/cannonlake: Move the FSP related callbacks to separate files by Rizwan Qureshi · 6 years ago