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24efe73dfd6bb52cd815513fc27e728db7481fd7
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northbridge
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intel
24efe73
nb/intel/sandybridge/raminit: Move fill_smbios17 to ddr3.c
by Patrick Rudolph
· 6 years ago
eb6f2f5
nb/intel/pineview: Use a common MMCONF_BASE_ADDRESS
by Arthur Heymans
· 6 years ago
015339f
nb/intel/pineview: Use the correct address for the RCVEN strobe
by Arthur Heymans
· 6 years ago
1f6369e
nb/intel/pineview: Use i2c block read to fetch SPD
by Arthur Heymans
· 6 years ago
2de750b
nb/intel/raminit: Remove unused headers
by Patrick Rudolph
· 6 years ago
08c9a7c
nb/intel/sandybridge/raminit: Fix DIMM type mapping
by Patrick Rudolph
· 6 years ago
15e6469
nb/intel/sandybridge: Fill in DIMM serial number
by Patrick Rudolph
· 6 years ago
89af71c
sandybridge/raminit_common.c: fix printram statement
by Iru Cai
· 6 years ago
1faa11e
Fix PCI ACPI _OSC methods
by Marc Jones
· 6 years ago
8da2fa0
nb/intel/haswell: Always locate mrc.bin in the COREBOOT fmap region
by Arthur Heymans
· 6 years ago
3d45000
src: Fix typo
by Elyes HAOUAS
· 6 years ago
64f6b71
src/northbridge: Fix typo
by Elyes HAOUAS
· 6 years ago
3a2f900
x4x/raminit_ddr23: use MCHBAR AND/OR/AND_OR macros [2/2]
by Felix Held
· 6 years ago
f83d80b
nehalem/raminit: remove read_mchbar functions
by Felix Held
· 6 years ago
22ca8cb
nehalem/raminit: clean up code and remove write_mchbar functions
by Felix Held
· 6 years ago
752cdbc
northbridge/nehalem: add MCHBAR8/16 AND_OR macros
by Felix Held
· 6 years ago
04be2dd
nehalem/raminit: clean up code and use MCHBAR macros
by Felix Held
· 6 years ago
29a9c07
nehalem/raminit: remove REAL define and most dead code
by Felix Held
· 6 years ago
ad691ad
sandybridge/raminit_mrc: remove reference to report_platform_info()
by Matt DeVillier
· 6 years ago
9fe248f
sandybridge/raminit_common: use MCHBAR AND/OR macros in remaining places
by Felix Held
· 6 years ago
9cf1dd2
sandybridge/raminit_common: use macro for execute command queue register
by Felix Held
· 6 years ago
f9b826a
sandybridge/raminit_common: use FOR_ALL_CHANNELS macro
by Felix Held
· 6 years ago
b802c07
sandybridge/raminit_common: use MCHBAR AND/OR/AND_OR macros [2/2]
by Felix Held
· 6 years ago
2463aa9
sandybridge/raminit_common: use MCHBAR AND/OR/AND_OR macros [1/2]
by Felix Held
· 6 years ago
fe68a77
northbridge/sandybridge: add MCHBAR32 AND/OR/AND_OR access macros
by Felix Held
· 6 years ago
8908931
nb/intel/gm45: Don't use PCI operations on the pci_domain device
by Arthur Heymans
· 6 years ago
15e1b39
nb/intel/pineview: Don't use PCI operations on the pci_domain device
by Arthur Heymans
· 6 years ago
c6e13b6
nb/intel/x4x: Don't use PCI operations on the pci_domain device
by Arthur Heymans
· 6 years ago
1704120
nb/intel/sandybridge: Don't use PCI operations on the pci_domain device
by Arthur Heymans
· 6 years ago
432575c
x4x/raminit_ddr23: use MCHBAR AND/OR/AND_OR macros [1/2]
by Felix Held
· 6 years ago
aade90e
nb/intel/gm45: Use common code for SMM in TSEG
by Arthur Heymans
· 7 years ago
6cd2c2f
northbridge/x4x: add MCHBAR AND/OR/AND_OR access macros
by Felix Held
· 6 years ago
86b299a
northbridge/nehalem: add MCHBAR AND/OR/AND_OR macros
by Felix Held
· 6 years ago
00d2b91
northbridge/nehalem: clean up header file
by Felix Held
· 6 years ago
2bb3cdf
sandybridge/raminit_common: use MCHBAR32 macro everywhere
by Felix Held
· 6 years ago
55823c3
sandybridge/raminit: use MCHBAR32 macro everywhere
by Felix Held
· 6 years ago
b9267f0
sandybridge: add brackets to MCHBAR/EPBAR/DMIBAR access macros
by Felix Held
· 6 years ago
708cf4b
nb/intel/sandybridge: Bump MRC_CACHE_VERSION
by Patrick Rudolph
· 6 years ago
ef8c559
nb/intel/sandybridge/report_platform: Move remaining code to sb folder
by Patrick Rudolph
· 6 years ago
9e1b9b5
nb/intel/sandybridge: Move CPU report to cpu folder
by Patrick Rudolph
· 6 years ago
74203de
intel/sandybridge: Don't hardcode platform type
by Patrick Rudolph
· 7 years ago
5af2dea
nb/intel/sandybridge/raminit: Fix SMBIOS 17 bus width
by Patrick Rudolph
· 7 years ago
652c491
nb/intel/sandybridge/raminit: Fix PDWN_mode on desktops
by Patrick Rudolph
· 7 years ago
4c2f26c
nb/intel/nehalem: Remove the C native graphic init
by Arthur Heymans
· 6 years ago
db70f3b
drivers/tpm: Add TPM ramstage driver for devices without vboot.
by Philipp Deppenwiese
· 6 years ago
b009ac4
nb/intel/sandybridge/raminit: Fix non ASCII char
by Patrick Rudolph
· 6 years ago
5ee9bc1
nb/intel/sandybridge/raminit: Set REFIx9 according to spec
by Patrick Rudolph
· 7 years ago
a4fc7be
nb/i945/raminit: Correct C0DRAMW & C1DRAMW for 4 DIMMs
by Elyes HAOUAS
· 6 years ago
fd051dc
src/northbridge: Use "foo *bar" instead of "foo* bar"
by Elyes HAOUAS
· 6 years ago
21b71ce6
src/nb: Fix non-local header treated as local
by Elyes HAOUAS
· 6 years ago
7866d49
arch/x86/acpi: Add DMAR RMRR helper functions
by Matt DeVillier
· 6 years ago
a8a9f34
sb/intel/i82801{g,j}x: Automatically generate ACPI PIRQ tables
by Arthur Heymans
· 7 years ago
e798e6a
sb/intel/i82801ix: Use the common ACPI pirq generator
by Arthur Heymans
· 7 years ago
fe25107
nb/intel/i945: Remove dead code
by Elyes HAOUAS
· 6 years ago
58a8953
Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location"
by Arthur Heymans
· 6 years ago
371e7d9
nb/intel/e7505: Leave ROM as un-cacheable in postcar
by Kyösti Mälkki
· 6 years ago
aea8eec
nb/intel/i440bx: Switch to POSTCAR_STAGE
by Kyösti Mälkki
· 6 years ago
5469907
nb/intel/i440bx: Move to RELOCATABLE_RAMSTAGE
by Kyösti Mälkki
· 6 years ago
54d6a28
cpu/intel/slot_1: Switch to different CAR setup
by Kyösti Mälkki
· 6 years ago
847f12b
nb/intel/nehalem: Fix DEVEN defines
by Patrick Rudolph
· 6 years ago
df946b8
nb/intel/x4x: Issue a hard reset with empty MRC cache on warm reset
by Arthur Heymans
· 6 years ago
faa5f98
cpu/intel/haswell: Use the common intel romstage_main function
by Arthur Heymans
· 6 years ago
5e2ac2c
nb/intel/fsp_rangeley: Use MSR_PLATFORM_INFO instead of 0xce
by Elyes HAOUAS
· 7 years ago
e809305
nb/intel/x4x: Deprecate native graphic init
by Arthur Heymans
· 6 years ago
7345a17
nb/intel/x4x: Fix a few things in set_enhanced_mode
by Arthur Heymans
· 6 years ago
5a9dbde
nb/intel/x4x: Work around a quirk
by Arthur Heymans
· 6 years ago
0602ce6
nb/intel/x4x: Add the option for stacked channel map settings
by Arthur Heymans
· 6 years ago
b0f1988
src: Get rid of unneeded whitespace
by Elyes HAOUAS
· 6 years ago
f2dd049
libgfxinit: Enable G45 support (for GM45/X4X)
by Nico Huber
· 7 years ago
4bdfebd
nb/intel/pineview: Enable and allocate 8M for TSEG
by Arthur Heymans
· 6 years ago
e07df9d
nb/intel/i945: Enable and allocate 8M for TSEG
by Arthur Heymans
· 6 years ago
f6d1477
nb/intel/i945: Add a common function to compute TSEG size
by Arthur Heymans
· 7 years ago
58d6ff1
intel/e7505: Remove ROMCC workaround
by Kyösti Mälkki
· 6 years ago
730df3c
arch/x86: Make RELOCATABLE_RAMSTAGE the default
by Kyösti Mälkki
· 8 years ago
7904e72
arch/x86: Flag platforms without RELOCATABLE_RAMSTAGE
by Kyösti Mälkki
· 6 years ago
88af0f3
cpu/intel/haswell: Switch to POSTCAR_STAGE
by Arthur Heymans
· 6 years ago
02b13fd
cpu/intel/model_2065x: Switch to POSTCAR_STAGE
by Arthur Heymans
· 6 years ago
6fcd7b8
cpu/intel/model_206ax: Switch to POSTCAR_STAGE
by Arthur Heymans
· 6 years ago
3a4edb6
nb/intel/gm45: Switch to POSTCAR_STAGE
by Arthur Heymans
· 6 years ago
4ff675e
nb/intel/x4x: Switch to POSTCAR_STAGE
by Arthur Heymans
· 6 years ago
aa7cf55
nb/intel/pineview: Switch to POSTCAR_STAGE
by Arthur Heymans
· 6 years ago
2dcc3a5
nb/intel/i945: Switch to POSTCAR_STAGE
by Arthur Heymans
· 6 years ago
c07f8fb
security/tpm: Unify the coreboot TPM software stack
by Philipp Deppenwiese
· 6 years ago
961d31b
intel/i440bx: Drop tests for LATE_CBMEM_INIT
by Kyösti Mälkki
· 6 years ago
448d9fb
src: Use "foo *bar" instead of "foo* bar"
by Elyes HAOUAS
· 6 years ago
089b908
nb/intel: Use postcar_frame_add_romcache()
by Nico Huber
· 6 years ago
f369e60
northbridge/intel: Remove unneeded includes
by Elyes HAOUAS
· 6 years ago
3e893bb
intel/socket_mPGA604 intel/e7505: Switch to POSTCAR_STAGE
by Kyösti Mälkki
· 6 years ago
8168046
intel/e7505: Move to RELOCATABLE_RAMSTAGE
by Kyösti Mälkki
· 6 years ago
4c0e277
intel/e7505: Assume AGP slot disabled
by Kyösti Mälkki
· 6 years ago
717b6e3
aopen/dxplplusu intel/e7505: Move to EARLY_CBMEM_INIT
by Kyösti Mälkki
· 6 years ago
9e69c87
intel/e7505: Fix domain resources
by Kyösti Mälkki
· 6 years ago
654cc2f
{cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriate
by Nico Huber
· 6 years ago
5474eb1
src/northbridge: Add and update license headers
by Martin Roth
· 6 years ago
148b1db
nb/intel/fsp_sandybridge: Fix lost const qualifier on 'device_t'
by Elyes HAOUAS
· 6 years ago
0d28495
nb/intel/x4x: Adapt post JEDEC for DDR3
by Arthur Heymans
· 7 years ago
3fa103a
nb/intel/x4x/raminit: Add DDR3 enhanced mode and power settings
by Arthur Heymans
· 7 years ago
b4a7804
nb/intel/x4x/raminit: Add DDR3 specific dra/drb settings
by Arthur Heymans
· 7 years ago
b5170c3
nb/intel/x4x: Implement write leveling
by Arthur Heymans
· 7 years ago
f128726
nb/intel/x4x: Add DDR3 JEDEC init
by Arthur Heymans
· 7 years ago
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