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review.coreboot.org / coreboot / 1eecb8c814fa05e9902ddcb139a6e8b3a226ffa6 / src / mainboard / intel / dg43gt / devicetree.cb
  1. 1eecb8c nb/intel/x4x: Hook up PCI domain and CPU bus ops to devicetree by Arthur Heymans · 1 year, 8 months ago
  2. d1ccecf sb/intel/i82801jx/sata.c: Drop always-false is_mobile check by Angel Pons · 4 years ago
  3. 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 2 months ago
  4. 674ad92 src/mainboard: Replace GPLv2 long form headers with SPDX header by Elyes HAOUAS · 4 years, 2 months ago
  5. 078bc41 mainboard/[g-p]*: Remove copyright notices by Patrick Georgi · 4 years, 4 months ago
  6. 45b5e03 mb/intel/dg43gt: Make devicetree prettier by Angel Pons · 4 years, 7 months ago
  7. c484da1 sb/intel/i82801jx: Add common code for LPC decode by Arthur Heymans · 4 years, 8 months ago
  8. 055d4f2 mb/intel/dg43gt: Program the subsystemid by Arthur Heymans · 6 years ago
  9. b93f482 mb/intel/dg43gt/devicetree.cb: Use tabs over spaces by Elyes HAOUAS · 6 years ago
  10. b474445 mb/intel/dg43gt: Set SuperIO gpio correctly by Arthur Heymans · 7 years ago
  11. e4188a2 mb/intel/dg43gt: Configure clockgen by Arthur Heymans · 7 years ago
  12. 2a4aada mb/intel/dg43gt: Add mainboard by Arthur Heymans · 7 years ago