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review.coreboot.org / coreboot / 1ec5e744c63938aa75e80e8d7548d05e998660a2 / src / northbridge / intel / sandybridge
  1. 1ec5e74 Intel Sandybridge: add reserved memory as resources by Kyösti Mälkki · 12 years ago
  2. d4ee808 sandybridge: reinitialize usbdebug after MRC by Sven Schnelle · 12 years ago
  3. efff733 Refactor driver structs by Patrick Georgi · 12 years ago
  4. 1b3207e CTDP: Only do TDP down/nominal change from TNP0 by Duncan Laurie · 12 years ago
  5. 55864ef ACPI: Add support for runtime config TDP down by Duncan Laurie · 12 years ago
  6. f4d3623 ELOG: Add support for a monotonic boot counter in CMOS by Duncan Laurie · 12 years ago
  7. 696262b More descriptive error messages in Sandybridge raminit code by Stefan Reinauer · 12 years ago
  8. 9c4c6ab ELOG: Fix boot count increment for non-wake case by Duncan Laurie · 12 years ago
  9. fe7b5d2 Ivybridge: fix workaround and enable PAIR by Duncan Laurie · 12 years ago
  10. 77dbbac CPU: Add basic support for Nominal Configurable TDP by Duncan Laurie · 12 years ago
  11. 6097e19 Make ACPI code detect Sandy/Ivy Bridge dynamically by Stefan Reinauer · 12 years ago
  12. afcaac2 Drop (empty) sandybridge_late_initialization() by Stefan Reinauer · 12 years ago
  13. baae2d2 Add support for HM70 and NM70 LPC bridge by Stefan Reinauer · 12 years ago
  14. 542e962 Print PCI ID of PCH during boot up by Stefan Reinauer · 12 years ago
  15. c664387 Drop leading spaces from CPU name string by Stefan Reinauer · 12 years ago
  16. 4821489 Fix MRC cache update delays by Stefan Reinauer · 12 years ago
  17. 496f4a0 SandyBridge: Add another PCI device ID for northbridge by Walter Murphy · 12 years ago
  18. da83a5f Fixes to enable RC6 on IvyBridge by Duncan Laurie · 12 years ago
  19. cc55b9b Define global uma_memory variables by Kyösti Mälkki · 12 years ago
  20. 88fc0b9 Sandybridge: Remove remnants of FDT support from MRC cache code by Stefan Reinauer · 12 years ago
  21. 6e901fd Sandybridge: Fix MRC cache calculation by Stefan Reinauer · 12 years ago
  22. bb11e60 Hook up MRC cache update by Stefan Reinauer · 12 years ago
  23. 1244f4b Rework Sandybridge MRC cache handling by Stefan Reinauer · 12 years ago
  24. e166782 Clean up #ifs by Patrick Georgi · 12 years ago
  25. f125d80 Add missing newline to printk in Sandybridge init code by Stefan Reinauer · 12 years ago
  26. cafedcf Strip quotes from Sandybridge MRC blob by Stefan Reinauer · 12 years ago
  27. 7a3f36a Sandybridge: Display platform information early by Vadim Bendebury · 12 years ago
  28. 8508cff Update Ivybridge GT power meter tables by Duncan Laurie · 12 years ago
  29. dd585b8 Update ivybridge graphics initialization by Duncan Laurie · 12 years ago
  30. 7b508dd Only send ME Dram Init Done message on Sandybridge by Duncan Laurie · 12 years ago
  31. 0ff99b7 Modify DMI init for IvyBridge by Vincent Palatin · 12 years ago
  32. e6063fe Fix Sandybridge/Ivybridge mainboards according to code review by Stefan Reinauer · 12 years ago
  33. 6ea86b1 Sandybridge: Temporarily disable MRC cache finding code by Stefan Reinauer · 12 years ago
  34. e9dfdd9 Reverse Vendor ID & Device ID for map_oprom_vendev() by Martin Roth · 12 years ago
  35. 16401b8 SMM: Add udelay on Sandybridge systems by Stefan Reinauer · 12 years ago
  36. 00636b0 Add support for Intel Sandybridge CPU (northbridge part) by Stefan Reinauer · 12 years ago