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review.coreboot.org / coreboot / 1e24bf3f719f82c16fd577e87900e1aa0fd6605b / src / soc / intel / sch / pcie.c
  1. 4bab6e7 intel/sch: Merge northbridge and southbridge in src/soc by Stefan Reinauer · 8 years ago[Renamed from src/southbridge/intel/sch/pcie.c]
  2. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  3. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  4. a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 11 years ago
  5. 405721d Fix a few whitespace and coding style issues. by Uwe Hermann · 14 years ago
  6. be61a17 Support Intel SCH (Poulsbo) and add iwave/iWRainbowG6 board which uses it. by Patrick Georgi · 14 years ago