Gitiles
Code Review
Sign In
review.coreboot.org
/
coreboot
/
1cc3416f5fb58883fdad7192856c258c01909fd7
/
src
/
northbridge
/
intel
/
sandybridge
1cc3416
Add support to enable/disable builtin GbE (again)
by Stefan Reinauer
· 11 years ago
714212a
Revert "Add support to enable/disable builtin GbE"
by Kyösti Mälkki
· 11 years ago
eac00d2
intel/sandybridge: Locate CBMEM TOC early in ramstage
by Kyösti Mälkki
· 11 years ago
d358a50
Add support to enable/disable builtin GbE
by Stefan Reinauer
· 11 years ago
483ff82
sandybridge: Store MRC cache in CBFS
by Patrick Georgi
· 11 years ago
a296ce7
Move the MARK_GRAPHICS_MEM_WRCOMB to x86 architecture
by Ronald G. Minnich
· 11 years ago
5750fdd
Intel GM45, 945, SNB: Move `multiply_to_tsc()` to `tsc.h`
by Ronald G. Minnich
· 11 years ago
51837f9
Intel Sandy Bridge: udelay.c: Change comparison from <= to <
by Paul Menzel
· 11 years ago
243aa44
boot: remove cbmem_post_handling()
by Aaron Durbin
· 11 years ago
c6f2722
sandybridge: enable ROM caching
by Aaron Durbin
· 11 years ago
f567f16
sandybridge: add option to mark graphics memory write-combining.
by Aaron Durbin
· 11 years ago
bb4e79a
x86: add new mtrr implementation
by Aaron Durbin
· 11 years ago
c965076
resources: introduce reserved_ram_resource()
by Aaron Durbin
· 11 years ago
24d1d4b
x86: Unify arch/io.h and arch/romcc_io.h
by Stefan Reinauer
· 11 years ago
69efaa0
Google Link: Add remaining code to support native graphics
by Ronald G. Minnich
· 11 years ago
e7ae96f
Add Intel Panther Point USB3 initialization
by Marc Jones
· 12 years ago
a46a712
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
by Paul Menzel
· 11 years ago
fd611f9
Drop CONFIG_WRITE_HIGH_TABLES
by Stefan Reinauer
· 11 years ago
0aa37c4
sconfig: rename lapic_cluster -> cpu_cluster
by Stefan Reinauer
· 12 years ago
4aff445
sconfig: rename pci_domain -> domain
by Stefan Reinauer
· 12 years ago
600784e
spi.h: Rename the spi.h to spi-generic.h
by Zheng Bao
· 12 years ago
6fe0cab
Extend CBFS to support arbitrary ROM source media.
by Hung-Te Lin
· 12 years ago
816e9d1
Support for Celeron 1007U
by Stefan Reinauer
· 12 years ago
5079a0d
Remove assembly coded log2 function
by Ronald G. Minnich
· 12 years ago
e135ac5
Remove AMD special case for LAPIC based udelay()
by Patrick Georgi
· 12 years ago
23f38cd
Get rid of drivers class
by Patrick Georgi
· 12 years ago
6446626
Use new system agent binaries
by Stefan Reinauer
· 12 years ago
313ec9d
Sandybridge: Set PEG clock gating
by Marc Jones
· 12 years ago
7e8c8e9
Add PCIe init and NMode flag to PEI data structure
by Stefan Reinauer
· 12 years ago
e8179b5
Add ddr3lv_support flag to pei_data structure
by Duncan Laurie
· 12 years ago
53508fe
pei_data.h: Fix comment
by Marc Jones
· 12 years ago
48a4a7f
Provide MRC with a console printing callback function
by Vadim Bendebury
· 12 years ago
e5a0a5d
Initial IGD OpRegion implementation
by Stefan Reinauer
· 12 years ago
ad67791
Avoid using hardcoded values in MRC cache code
by Vadim Bendebury
· 12 years ago
a1ea822
Make coreboot use the offset parameter in cbfstool create
by Stefan Reinauer
· 12 years ago
4c8027a
Make register/value lists const
by Stefan Reinauer
· 12 years ago
357bb2d
SandyBridge/IvyBridge: Use flash map to find MRC cache
by Stefan Reinauer
· 12 years ago
c6b9f92
Add missing newline in error message
by Stefan Reinauer
· 12 years ago
cf81b82
CMOS: Move MRC seed offset into upper bank
by Duncan Laurie
· 12 years ago
fee73df
Auto-declare chip_operations
by Kyösti Mälkki
· 12 years ago
7874e9d
Sandybridge: Fix integer overrun in romstage udelay()
by Stefan Reinauer
· 12 years ago
cf8e466
Cleanup coreboot memory table includes
by Kyösti Mälkki
· 12 years ago
9ca1c0a
Sandy/Ivy Bridge and Cougar/Panther Point: Fix names
by Stefan Reinauer
· 12 years ago
5e29f00
Intel and GFXUMA: drop redundant use of lb_add_memory_range()
by Kyösti Mälkki
· 12 years ago
7f189cc
Intel Sandybridge and UMA: use mmio_resource()
by Kyösti Mälkki
· 12 years ago
1ec5e74
Intel Sandybridge: add reserved memory as resources
by Kyösti Mälkki
· 12 years ago
d4ee808
sandybridge: reinitialize usbdebug after MRC
by Sven Schnelle
· 12 years ago
efff733
Refactor driver structs
by Patrick Georgi
· 12 years ago
1b3207e
CTDP: Only do TDP down/nominal change from TNP0
by Duncan Laurie
· 12 years ago
55864ef
ACPI: Add support for runtime config TDP down
by Duncan Laurie
· 12 years ago
f4d3623
ELOG: Add support for a monotonic boot counter in CMOS
by Duncan Laurie
· 12 years ago
696262b
More descriptive error messages in Sandybridge raminit code
by Stefan Reinauer
· 12 years ago
9c4c6ab
ELOG: Fix boot count increment for non-wake case
by Duncan Laurie
· 12 years ago
fe7b5d2
Ivybridge: fix workaround and enable PAIR
by Duncan Laurie
· 12 years ago
77dbbac
CPU: Add basic support for Nominal Configurable TDP
by Duncan Laurie
· 12 years ago
6097e19
Make ACPI code detect Sandy/Ivy Bridge dynamically
by Stefan Reinauer
· 12 years ago
afcaac2
Drop (empty) sandybridge_late_initialization()
by Stefan Reinauer
· 12 years ago
baae2d2
Add support for HM70 and NM70 LPC bridge
by Stefan Reinauer
· 12 years ago
542e962
Print PCI ID of PCH during boot up
by Stefan Reinauer
· 12 years ago
c664387
Drop leading spaces from CPU name string
by Stefan Reinauer
· 12 years ago
4821489
Fix MRC cache update delays
by Stefan Reinauer
· 12 years ago
496f4a0
SandyBridge: Add another PCI device ID for northbridge
by Walter Murphy
· 12 years ago
da83a5f
Fixes to enable RC6 on IvyBridge
by Duncan Laurie
· 12 years ago
cc55b9b
Define global uma_memory variables
by Kyösti Mälkki
· 12 years ago
88fc0b9
Sandybridge: Remove remnants of FDT support from MRC cache code
by Stefan Reinauer
· 12 years ago
6e901fd
Sandybridge: Fix MRC cache calculation
by Stefan Reinauer
· 12 years ago
bb11e60
Hook up MRC cache update
by Stefan Reinauer
· 12 years ago
1244f4b
Rework Sandybridge MRC cache handling
by Stefan Reinauer
· 12 years ago
e166782
Clean up #ifs
by Patrick Georgi
· 12 years ago
f125d80
Add missing newline to printk in Sandybridge init code
by Stefan Reinauer
· 12 years ago
cafedcf
Strip quotes from Sandybridge MRC blob
by Stefan Reinauer
· 12 years ago
7a3f36a
Sandybridge: Display platform information early
by Vadim Bendebury
· 12 years ago
8508cff
Update Ivybridge GT power meter tables
by Duncan Laurie
· 12 years ago
dd585b8
Update ivybridge graphics initialization
by Duncan Laurie
· 12 years ago
7b508dd
Only send ME Dram Init Done message on Sandybridge
by Duncan Laurie
· 12 years ago
0ff99b7
Modify DMI init for IvyBridge
by Vincent Palatin
· 12 years ago
e6063fe
Fix Sandybridge/Ivybridge mainboards according to code review
by Stefan Reinauer
· 12 years ago
6ea86b1
Sandybridge: Temporarily disable MRC cache finding code
by Stefan Reinauer
· 12 years ago
e9dfdd9
Reverse Vendor ID & Device ID for map_oprom_vendev()
by Martin Roth
· 12 years ago
16401b8
SMM: Add udelay on Sandybridge systems
by Stefan Reinauer
· 12 years ago
00636b0
Add support for Intel Sandybridge CPU (northbridge part)
by Stefan Reinauer
· 12 years ago