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review.coreboot.org / coreboot / 182dbdeac4b2489f8d03a47a79ab28ad556d9d21 / src / southbridge / intel / lynxpoint / me_9.x.c
  1. 182dbde src/southbridge: Use SPDX for GPL-2.0-only files by Angel Pons · 4 years, 5 months ago
  2. f3f36fa src (minus soc and mainboard): Remove copyright notices by Patrick Georgi · 4 years, 5 months ago
  3. 21d6a27 arch/x86: Replace some __SMM__ guards by Kyösti Mälkki · 4 years, 10 months ago
  4. be5317f ELOG: Avoid some preprocessor use by Kyösti Mälkki · 4 years, 10 months ago
  5. c86fc8e sb,soc/intel: Reduce preprocessor use with ME debugging by Kyösti Mälkki · 4 years, 10 months ago
  6. ff744bf src/southbridge: change "unsigned" to "unsigned int" by Martin Roth · 4 years, 10 months ago
  7. 400f9ca src/southbridge: Use 'include <stdlib.h>' when appropriate by Elyes HAOUAS · 5 years ago
  8. 12b121c southbridge/intel: Tidy up preprocessor and headers by Kyösti Mälkki · 5 years ago
  9. 4a0f071 {northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem() by Subrata Banik · 5 years ago
  10. cd49cce coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) by Julius Werner · 5 years ago
  11. 13f6650 device/mmio.h: Add include file for MMIO ops by Kyösti Mälkki · 5 years ago
  12. f1b58b7 device/pci: Fix PCI accessor headers by Kyösti Mälkki · 5 years ago
  13. 1dcd8db src/southbridge: Get rid of device_t by Elyes HAOUAS · 6 years ago
  14. 54f9424 sb/intel/lynxpoint: Remove irrelevant conditional statement by Elyes HAOUAS · 6 years ago
  15. f9de5a4 src/southbridge: Add required space before the open parenthesis by Elyes HAOUAS · 6 years ago
  16. 7a1a3ad southbridge/intel: add IS_ENABLED() around Kconfig symbol references by Martin Roth · 7 years ago
  17. ba28e8d src/southbridge: Code formating by Elyes HAOUAS · 8 years ago
  18. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  19. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  20. bde6d30 x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer by Kevin Paul Herbert · 10 years ago
  21. 97ccefd southbridge/intel/lynxpoint/me_9.x.c: Avoid unused func warn by Edward O'Callaghan · 10 years ago
  22. 546953c Replace hlt with halt() by Patrick Georgi · 10 years ago
  23. c3ed886 intel boards: Use acpi_is_wakeup_s3() by Kyösti Mälkki · 10 years ago
  24. 7bf4f48 southbridge/intel/lynxpoint/me_9.x.c: Use IS_ENABLED macro by Edward O'Callaghan · 10 years ago
  25. 0b3cd36 lynxpoint: me: Disable some verbose messages by Duncan Laurie · 11 years ago
  26. 0dc0d13 lynxpoint: me: Support ICC clock enables message by Duncan Laurie · 11 years ago
  27. 2017b4a lynxpoint: me: Allow for more than MKHI MEI messages by Duncan Laurie · 11 years ago
  28. 8056dc6 lynxpoint: Avoid any ME device communication in S3 path by Duncan Laurie · 11 years ago
  29. 3d299c4 lynxpoint me: add support for mbp clear wait in finalize step by Duncan Laurie · 11 years ago
  30. af98062 Revert "lynxpoint: Move ME lock down to ramstage" by Duncan Laurie · 11 years ago
  31. 1d048ca lynxpoint: Move ME lock down to ramstage by Duncan Laurie · 11 years ago
  32. 144f7b2 lynxpoint: Add missing ME MBP entries by Duncan Laurie · 11 years ago
  33. 24d1d4b x86: Unify arch/io.h and arch/romcc_io.h by Stefan Reinauer · 11 years ago
  34. b37d1fb lynxpoint: update MBP give up routine by Aaron Durbin · 11 years ago
  35. 26e7dd7 haswell: more ULT/LP support and minor tweaks by Duncan Laurie · 12 years ago
  36. be98524 lynxpoint: ME to BIOS Payload Updates by Aaron Durbin · 12 years ago
  37. 89f79a0 haswell: remove explicit pcie config accesses by Aaron Durbin · 12 years ago
  38. 9aa031e lynxpoint: Management Engine Updates by Aaron Durbin · 12 years ago
  39. 76c3700 haswell: Add initial support for Haswell platforms by Aaron Durbin · 12 years ago