Gitiles
Code Review Sign In
review.coreboot.org / coreboot / 18228168a5e5ada33390ca96ef4b6ee80a509a89 / src
  1. 1822816 drivers/intel/gma: Put gma_gfxinit() into its own header by Nico Huber · 7 years ago
  2. 625160f lib: Prepare for libhwbase' generated config file by Nico Huber · 7 years ago
  3. 6fea323 mainboard/google/Kahlee: Combine BiosCallOuts files by Martin Roth · 7 years ago
  4. 8aba24d soc/intel/apollolake: Switch to common p2sb by Lijian Zhao · 7 years ago
  5. 899f5ff soc/intel/cannonlake: Use common p2sb driver by Lijian Zhao · 7 years ago
  6. a3cbbf7 intel/common/p2sb: Add common p2sb driver by Lijian Zhao · 7 years ago
  7. bb59f67 soc/amd/common: Remove agesa_LateRunApTask() callback by Marc Jones · 7 years ago
  8. 95b6175 soc/intel/cannonlake: Add support for C state and P state by Shaunak Saha · 7 years ago
  9. 66b5acc soc/intel/cannonlake: remove duplicate power_state migration by Patrick Georgi · 7 years ago
  10. a547e40 purism/librem_skl: add new variant Librem 15 v3 by Matt DeVillier · 7 years ago
  11. c6202e8 soc/intel/apollolake: avoid double accounting for power state by Patrick Georgi · 7 years ago
  12. 4352994 purism/librem13v2: convert to variant setup by Matt DeVillier · 7 years ago
  13. f5e8fe5 soc/intel/apollolake: Fix broken GNVS offset for chromeos by Furquan Shaikh · 7 years ago
  14. af88398 soc/intel/skylake: Fix broken GNVS offset for chromeos by Furquan Shaikh · 7 years ago
  15. 74d8ed0 superio/acpi/pnp.asl: Fix PNP_READ_DMA/PNP_WRITE_DMA macros by Keith Hui · 7 years ago
  16. b8d66bb mainboard/intel/cannonlake_rvp: Enable variant gpio configuration by John Zhao · 7 years ago
  17. aa8e5d3 soc: Add Kconfig for each soc vendor by Chris Ching · 7 years ago
  18. 5da1e31 mb/sapphire/pureplatinumh61: Remove S3 resume delay by Nicola Corna · 7 years ago
  19. fd0a891 drv/intel/gma/opregion: fix opregion version for Windows by Matt DeVillier · 7 years ago
  20. fb1cd09 purism/librem13v2: migrate from FSP 1.1 to 2.0 by Matt DeVillier · 7 years ago
  21. 9b6384c soc/intel/cannonlake: Increase stack size from 4KiB to 8KiB by John Zhao · 7 years ago
  22. 2f1b7aa mainboard/google/coral: Add USB2 phy setting override for Astronaut by ren kuo · 7 years ago
  23. bb98b38 nb/intel/pineview: Port ACPI opregion to pineview by Patrick Rudolph · 7 years ago
  24. 177f773 superio/ite/common: Make PECI a thermal mode by Vagiz Trakhanov · 7 years ago
  25. cc9c0cb superio/ite/common: Add temperature limits by Vagiz Trakhanov · 7 years ago
  26. 17c5771 superio/ite/common: Add temperature offset by Vagiz Trakhanov · 7 years ago
  27. c85890d soc/intel/cannonlake: Change max root port to 16 by Lijian Zhao · 7 years ago
  28. fea2429 security/vboot: Move vboot2 to security kconfig section by Philipp Deppenwiese · 7 years ago
  29. 9e0d69b soc/intel/skylake: pass SataSpeedLimit param to FSP2 by Matt DeVillier · 7 years ago
  30. c25c998 purism/librem13v2: Update microcode length in CBFS by Youness Alaoui · 7 years ago
  31. a8b35be purism/librem13v2: Fix USB settings and set OC pin by Youness Alaoui · 7 years ago
  32. c5b9658 purism/librem13v2: Update devicetree settings by Youness Alaoui · 7 years ago
  33. 3d60718 purism/librem13v2: Change DRAM Rcomp/DQS values by Youness Alaoui · 7 years ago
  34. c0a32ca purism/librem13v2: Add reading of serial number from CBFS by Youness Alaoui · 7 years ago
  35. e0603e3 skylake/me: Add debug output of HFST registers by Youness Alaoui · 7 years ago
  36. 251e8a8 google/kahlee: Add PSP to devicetree.cb by Marshall Dawson · 7 years ago
  37. cb23e0f amd/gardenia: Add PSP to devicetree.cb by Marshall Dawson · 7 years ago
  38. 3191e0f soc/amd/common: Revert PI blob search hack by Marshall Dawson · 7 years ago
  39. 1899fbe src/security: Add security kconfig stub by Philipp Deppenwiese · 7 years ago
  40. ec69c48 mb/google/link: Enable libgfxinit by Nico Huber · 7 years ago
  41. 268e1f9 soc/amd/stoneyridge: Remove duplicate macros in pci_devs.h by Chris Ching · 7 years ago
  42. bd31642 intel/i210: Set bus master bit in command register by Werner Zeh · 7 years ago
  43. b6ac3a2 kahlee: Set Kahlee GPEs by Marc Jones · 7 years ago
  44. 794d222 cr50_enable_update: Add printk before EC hibernate by Shelley Chen · 7 years ago
  45. bdfc5f5 google/fizz: Set PL2 value based on sku id/charge max power by Shelley Chen · 7 years ago
  46. ebd5330 chromeec: Add function to retrieve usb c charger info by Shelley Chen · 7 years ago
  47. bd885c5 lib/gpio: constify array inputs by Aaron Durbin · 7 years ago
  48. e8e72bd stoneyridge: Add SCI/GPE configuration by Marc Jones · 7 years ago
  49. f1c8ea3 soc/stoneyridge: Remove _PRW ASL by Marc Jones · 7 years ago
  50. 2e8476c stoneyridge: Fix USB ASL by Marc Jones · 7 years ago
  51. c866f87 intel/cannonlake_rvp: Update board name by Lijian Zhao · 7 years ago
  52. 6a09eee soc/intel/cannonlake: Add platform.asl by Lijian Zhao · 7 years ago
  53. 418535e soc/intel/skylake: update GNVS with SGX data by Pratik Prajapati · 7 years ago
  54. d06c764 soc/intel/apollolake: update GNVS with SGX data by Pratik Prajapati · 7 years ago
  55. 0e5eb46 intel/common/block/sgx: Add API to enumerate SGX resources and update GNVS by Pratik Prajapati · 7 years ago
  56. 90ebf96 soc/intel/skylake: Add GNVS variables and include SGX ASL by Pratik Prajapati · 7 years ago
  57. 03a2353 soc/intel/apollolake: Add GNVS variables and include SGX ASL by Pratik Prajapati · 7 years ago
  58. 771d483 intel/common/acpi: Add common SGX ASL by Pratik Prajapati · 7 years ago
  59. ba142c5 vendorcode/amd/pi/00670F00: Remove S3 restore functions by Martin Roth · 7 years ago
  60. 2960043 soc/amd/common: Set AltImageBasePtr to 0 by Martin Roth · 7 years ago
  61. 7eb363c Stoney Ridge Platforms: cast AGESA tables to void * by Martin Roth · 7 years ago
  62. c450fbe Stoney Ridge Platforms: Make AGESA callout tables common by Martin Roth · 7 years ago
  63. 70b9245 mainboard/pcengines/apu2: add apu3 and apu5 variants by Kamil Wcislo · 7 years ago
  64. 6a35fab soc/amd/stoneyridge: Use macros for PCI_DEVFN calls by Chris Ching · 7 years ago
  65. c5ecd3e soc/amd/stoneyridge: Replace magic registers by Richard Spiegel · 7 years ago
  66. 025e0cc intel/fsp: Update cannonlake FSP header by Lijian Zhao · 7 years ago
  67. e7a1e7d soc/intel/cannonlake: Fix HECI error on reset by Lijian Zhao · 7 years ago
  68. ed16941 soc/intel/cannonlake: Use EBDA structure to store soc reserve memory size by Subrata Banik · 7 years ago
  69. f506cf0 soc/intel/skylake: Use EBDA structure to store soc reserve memory size by Subrata Banik · 7 years ago
  70. b0c4cbb soc/intel/cannonlake: Add IGD Support and pre-OS display code by Abhay Kumar · 7 years ago
  71. 0e35eb2 siemens/mc_bdx1: Initialize GPIOs by Werner Zeh · 7 years ago
  72. 4bf11ce soc/fsp_broadwell_de: Add support for GPIO handling by Werner Zeh · 7 years ago
  73. e77d588 cpu/x86: add AMD registers to SMM save state by John E. Kabat Jr · 7 years ago
  74. 216ad21 sb/intel/bd82x6x: Add new USB currents by Vagiz Trakhanov · 7 years ago
  75. 771be48 nb/sandybridge: Add a kconfig option to ignore XMP max DIMMs by Vagiz Trakhanov · 7 years ago
  76. 15cb5be src/vendorcode/amd: Use AR variable in Makefiles by Martin Roth · 7 years ago
  77. e097585 AGESA f14: Fix DDI maps in OemCustomize.c by Kyösti Mälkki · 7 years ago
  78. 9fee35c AGESA: Split long lines in OemCustomize.c by Kyösti Mälkki · 7 years ago
  79. c700829 AGESA f14: Drop PlatformGnbPcieComplex.h by Kyösti Mälkki · 7 years ago
  80. 57760e3 pcengines/apu2: Add timestamps to romstage by Michał Żygowski · 7 years ago
  81. 4e4a763 Enable time stamp collection by default on x86 by Paul Menzel · 9 years ago
  82. 1432cbc google/chromeec: Do not set wake mask before logging EC events by Furquan Shaikh · 7 years ago
  83. 4854761 mb/google/poppy: Log EC events during S0ix resume by Furquan Shaikh · 7 years ago
  84. 70b257f ec/google/chromeec: Export google_chromeec_log_events in ec.h by Furquan Shaikh · 7 years ago
  85. dd825fe soc/intel/skylake: Probe XHCI for wake source for Internal PME by Furquan Shaikh · 7 years ago
  86. 7284efe soc/intel/skylake: Prevent false logs in pch_xhci_port_wake_check by Furquan Shaikh · 7 years ago
  87. 8f2eadd soc/intel/skylake: Define mask for SMI handlers that can be run in SCI mode by Furquan Shaikh · 7 years ago
  88. c565bd4 soc/intel/skylake: Support logging wake source in SMM by Furquan Shaikh · 7 years ago
  89. 3efeeb2 soc/intel/skylake: Move power_state functions to pmutil.c by Furquan Shaikh · 7 years ago
  90. 2ce4ec0 soc/intel/skylake: Use PCH_DEV_* instead of PCH_DEVFN_* by Furquan Shaikh · 7 years ago
  91. a248018 soc/intel/skylake: Use newly added pmc_read_pm1_control by Furquan Shaikh · 7 years ago
  92. 43810d9 soc/intel/apollolake: Use newly added pmc_read_pm1_control by Furquan Shaikh · 7 years ago
  93. ab62018 soc/intel/common/block/pmc: Add helper routines to read/write PM1_CNT by Furquan Shaikh · 7 years ago
  94. e48fb54 soc/intel/common/block/pmc: Add new function pmc_fill_pm_reg_info by Furquan Shaikh · 7 years ago
  95. 2dc5ead elog: Support logging S0ix sleep/wake info in elog by Furquan Shaikh · 7 years ago
  96. f36ed21 mainboard/intel/cannonlake_rvp: Enable hardware P state control by Vaibhav Shankar · 7 years ago
  97. f46a9a0 arch/x86: restore forwarding table on resume for EARLY_EBDA_INIT by Aaron Durbin · 7 years ago
  98. c672043 soc/intel/cannonlake: Set platform Debug Probe Type by Lijian Zhao · 7 years ago
  99. 584af87 intel/cannonlake_rvp: Enable Audio DSP by Lijian Zhao · 7 years ago
  100. 0b21ad9 intel/cannonlake_rvp: Declare PCIE clock usage by Lijian Zhao · 7 years ago