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0ff99b7
Modify DMI init for IvyBridge
by Vincent Palatin
· 12 years ago
459b777
add new LPC controller device ID value
by Vadim Bendebury
· 12 years ago
8049fc9
Allow device ID arrays in the PCI driver structure
by Vadim Bendebury
· 12 years ago
599e204
Clean up Emerald Lake 2 mainboard directory
by Gabe Black
· 12 years ago
8172d0b
Allow more CPU cores on Emerald Lake 2 CRB
by Stefan Reinauer
· 12 years ago
f40a259
Set up ChromeOS dev mode, recovery, and write protect GPIOs on Emerald Lake 2.
by Gabe Black
· 12 years ago
e6063fe
Fix Sandybridge/Ivybridge mainboards according to code review
by Stefan Reinauer
· 12 years ago
a1155b4
Move VSA support from x86 to Geode
by Patrick Georgi
· 12 years ago
0909d86
Support adding stages with cbfs-files
by Patrick Georgi
· 12 years ago
943ddce
Make geode_lx use the vsa from blobs repository
by Patrick Georgi
· 12 years ago
5fe7a20
Set up the Emerald Lake 2 SMI and SCI sources based on the schematic.
by Gabe Black
· 12 years ago
7e9b9d8
Add Kconfig options to handle the blobs repository
by Patrick Georgi
· 12 years ago
e1ae4b2
Add support for Sandybridge base Samsung ChromeBox
by Stefan Reinauer
· 12 years ago
155e9b5
Add support for Sandybridge based Samsung ChromeBook
by Stefan Reinauer
· 12 years ago
6651da3
Add support for Intel Emerald Lake 2 CRB
by Stefan Reinauer
· 12 years ago
c31384e
Fix up Sandybridge C state generation code
by Stefan Reinauer
· 12 years ago
f69b468
acpigen: make acpigen_write_CST_package_entry non-static
by Stefan Reinauer
· 12 years ago
6ea86b1
Sandybridge: Temporarily disable MRC cache finding code
by Stefan Reinauer
· 12 years ago
35555167
acpi: Add defines for functional fixed hardware
by Stefan Reinauer
· 12 years ago
39205c6
acpigen: Add support for generating T state tables
by Stefan Reinauer
· 12 years ago
4cc8c70
Rework ACPI CST table generation
by Stefan Reinauer
· 12 years ago
a403c68
Add default map_oprom_vendev() for AMD Family 14h processors.
by Martin Roth
· 12 years ago
40aa9bc
Update amd/south_station/fadt.c with various fixes
by Martin Roth
· 12 years ago
61e7c28
ChromeOS: Add missing prototype for acpi_get_vdat_info()
by Stefan Reinauer
· 12 years ago
5b73d4d
acpigen: make acpigen_write_len_f() non static
by Stefan Reinauer
· 12 years ago
e9dfdd9
Reverse Vendor ID & Device ID for map_oprom_vendev()
by Martin Roth
· 12 years ago
0e672b5
coreboot_table.c: Add missing include files
by Stefan Reinauer
· 12 years ago
16401b8
SMM: Add udelay on Sandybridge systems
by Stefan Reinauer
· 12 years ago
80529ab
Cougar Point southbridge: Add includes and drop post_code()
by Stefan Reinauer
· 12 years ago
adc7bb0
ChromeOS: add missing string.h in gnvs.c
by Stefan Reinauer
· 12 years ago
b5866f2
SMSC MEC1308: Fix ACPI code to work with newer IASL versions
by Stefan Reinauer
· 12 years ago
bf34e94
SMM: unify mainboard APM command handlers
by Stefan Reinauer
· 12 years ago
ac8209a
cpu/cpu.h: add ROMCC guards
by Stefan Reinauer
· 12 years ago
ae5e11d
Move top level pc80 directory to drivers/
by Stefan Reinauer
· 12 years ago
aee1869
Updates to x86/include/arch/acpi.h for use in fadt.c
by Martin Roth
· 12 years ago
3110945
microcode: print date of microcode and unify output
by Stefan Reinauer
· 12 years ago
3f8989e
Revamp Intel microcode update code
by Stefan Reinauer
· 12 years ago
05e740f
Replace cache control magic numbers with symbols
by Patrick Georgi
· 12 years ago
8919729
ASUS M4A785T-M mainboard: fix screen flickering issues
by Denis 'GNUtoo' Carikli
· 12 years ago
1e9c1b3
Makefile: rename romstage linking filenames
by Kyösti Mälkki
· 12 years ago
38f2e9c
Makefile: rename coreboot_ap linking filenames
by Kyösti Mälkki
· 12 years ago
6b07b8d
Makefile: rename ramstage linking filenames
by Kyösti Mälkki
· 12 years ago
f775b8c
Makefile: rename bootblock linking filenames
by Kyösti Mälkki
· 12 years ago
f526889
rk886: Add ACPI support for LID switch
by Patrick Georgi
· 12 years ago
3294a0f1
Make timestamp collection conditional in hardwaremain.c
by Rudolf Marek
· 12 years ago
02c2047
Fix whitespace for ma785gm
by Alec Ari
· 12 years ago
8a527cf
Update MA785GM code
by Alec Ari
· 12 years ago
1d89f14
Intel 82801dx: compile early_smbus as separate object
by Kyösti Mälkki
· 12 years ago
0a19ddc
Add support for MA785GM-US2H
by Alec Ari
· 13 years ago
c02cbf1
alix2: add support for alix6
by Philip Prindeville
· 13 years ago
eeb8a06
Unbreak boards where chipset can select between FSB and serial APIC bus
by Rudolf Marek
· 12 years ago
1e6bf09
amd: Fix unused variable warning
by Vikram Narayanan
· 12 years ago
0db2ae3a
Makefile: define build result directories
by Kyösti Mälkki
· 12 years ago
93b4ed9
Intel e7505: build as separate object file
by Kyösti Mälkki
· 12 years ago
97c064f
Intel e7505: enable ECC scrubbing
by Kyösti Mälkki
· 12 years ago
a8111cf
nvramtool: Unify nvramtool and build_opt_tbl
by Vikram Narayanan
· 12 years ago
26b00e6
Refactor some alignment handling
by Patrick Georgi
· 12 years ago
d6e4d51
Revert wbind added to the reset_vector
by Marc Jones
· 12 years ago
77e4f7d
Intel e7505: refactor only
by Kyösti Mälkki
· 12 years ago
d1edb17
Fix the blank in acpi_tables.c
by zbao
· 12 years ago
a20132b
Do not produce temp s3.rom if the board doesn't need it.
by zbao
· 12 years ago
2132005
Fix messy code in ALIB creation
by zbao
· 12 years ago
585a400
Leverage the Pstate table created by AGESA.
by zbao
· 12 years ago
3f788e1
S3: Use old heap during normal boot
by zbao
· 12 years ago
899608d
Fix the blank in acpi_tables.c
by zbao
· 12 years ago
26c7b86
Intel e7505: handlers for undocumented registers
by Kyösti Mälkki
· 12 years ago
ad8c95f
kconfig: Improve 'General setup' menu docs.
by Uwe Hermann
· 12 years ago
e380b0f
More portable s3 scratch space creation
by Patrick Georgi
· 12 years ago
f543c7b
S3 code in the mainboard.
by zbao
· 12 years ago
f722373
S3 code in coreboot public folder.
by zbao
· 12 years ago
caf494c8
ACPI HEST table.
by zbao
· 12 years ago
a4fa814
cmos.layout: Remove invalid warning
by Vikram Narayanan
· 12 years ago
a85ca49
Bifferboard: Fix MAINBOARD_PART_NUMBER.
by Uwe Hermann
· 12 years ago
3aff1a3
Convert AOpen DXPL Plus mainboard to CAR
by Kyösti Mälkki
· 12 years ago
eb59636
Add support for aligned allocation
by Ron Minnich
· 12 years ago
3925622
S3 code in vendorcode folder.
by zbao
· 12 years ago
9bcdbf8
Add Southbridge support for S3.
by zbao
· 12 years ago
2c2e78d
Unify IO APIC address specification
by Patrick Georgi
· 13 years ago
5c1ff92
Intel e7505: cleanups
by Kyösti Mälkki
· 12 years ago
5bd271b
Intel e7505: renames only
by Kyösti Mälkki
· 12 years ago
05758bd
Remove obsolete empy macro definition
by Ron Minnich
· 12 years ago
14233a0
Actually return %ebx value from cpuid_ebx()
by Jonathan A. Kollasch
· 12 years ago
e875328
Remove Dell s1850
by Ron Minnich
· 12 years ago
d3801f4
Add support for SMSC MEC1308/1310 SuperI/O EC
by Stefan Reinauer
· 12 years ago
6626d6a
Add initial support for SMSC SIO1007 SuperI/O chip
by Stefan Reinauer
· 12 years ago
8198600
Add support for SMSC LPC47N207 SuperI/O chip
by Stefan Reinauer
· 12 years ago
2bdfb48
Fixes and Sandybridge support for lapic cpu init
by Stefan Reinauer
· 12 years ago
f8c7c23
Fix support for RAM-less multi-processor init
by Kyösti Mälkki
· 12 years ago
334532e
Add Sandybridge/Cougar Point support to SMM relocation handler
by Stefan Reinauer
· 12 years ago
c00dfbc
Cache 8MB flash instead of 4MB
by Stefan Reinauer
· 12 years ago
6293d30
Factor out function to find driver for a CPU
by Stefan Reinauer
· 12 years ago
61f4a74
Add constants for fast path resume copying
by Stefan Reinauer
· 12 years ago
5b6404e
Fix timer frequency detection on Sandybridge
by Stefan Reinauer
· 12 years ago
cab72d9
amdfam10: add phenom II as known cpu
by Bernhard Urban
· 12 years ago
deda997
Invalidate cache before first jump
by Stefan Reinauer
· 12 years ago
c6b2166
smbios: Don't fill out firmware version on ChromeOS
by Stefan Reinauer
· 12 years ago
31324c6
Fill out ChromeOS specific coreboot table extensions
by Stefan Reinauer
· 12 years ago
8c5b58e
Update documentation in smmrelocate.S to mention TSEG
by Stefan Reinauer
· 12 years ago
5c55463
Add support for Intel Sandybridge CPU
by Stefan Reinauer
· 12 years ago
00636b0
Add support for Intel Sandybridge CPU (northbridge part)
by Stefan Reinauer
· 12 years ago
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