- 0949e73 src/acpi to src/lib: Fix spelling errors by Martin Roth · 2 years, 11 months ago
- 6c7441f cpu/x86: Rename __protected_start symbol by Kyösti Mälkki · 3 years, 9 months ago
- 7522a8f arch/x86: Move prologue to .init section by Kyösti Mälkki · 3 years, 9 months ago
- 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 3 months ago
- 8a3453f src/drivers: Use SPDX for GPL-2.0-only files by Angel Pons · 4 years, 5 months ago
- 1b12b64 AGESA, binaryPI: implement C bootblock by Michał Żygowski · 4 years, 9 months ago
- 33d0fb8 AGESA,binaryPI: Add compatibility wrapper for romstage entry by Kyösti Mälkki · 4 years, 9 months ago
- 3aa17f7 AGESA,binaryPI: Fix stack location on entry to romstage by Michał Żygowski · 4 years, 9 months ago
- 2fa1cb1 AGESA,binaryPI: Remove __x86_64__ long mode in CAR by Michał Żygowski · 4 years, 9 months ago
- c574947 AGESA,binaryPI: Remove redundant SSE enable by Michał Żygowski · 4 years, 9 months ago
- 9266ce9 AGESA,binaryPI: Remove early_all_cores() by Kyösti Mälkki · 4 years, 9 months ago
- 5639736 binaryPI: Drop CAR teardown without POSTCAR_STAGE by Kyösti Mälkki · 7 years ago
- cddd600 AUTHORS: Move src/drivers/[a*-i*] copyrights into AUTHORS file by Martin Roth · 5 years ago
- cd49cce coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) by Julius Werner · 5 years ago
- dea45c1 drivers/amd/agesa/cache_as_ram.S: Fix coding style by Elyes HAOUAS · 6 years ago
- d4955f0 AGESA: Move API interface under drivers/ by Kyösti Mälkki · 7 years ago[Renamed from src/cpu/amd/agesa/cache_as_ram.S]
- 63fac81 AGESA: Implement POSTCAR_STAGE by Kyösti Mälkki · 7 years ago
- 7076aa5 AGESA: Rename assembly from .inc to .S by Kyösti Mälkki · 7 years ago[Renamed (91%) from src/cpu/amd/agesa/cache_as_ram.inc]
- fec6fa7 vendorcode/amd/agesa: Tidy up gcccar.inc by Kyösti Mälkki · 7 years ago
- 168ef39 cpu/*: Add whitespace around '<<' by Elyes HAOUAS · 7 years ago
- ba22e15 AGESA: Disable CAR with empty stack by Kyösti Mälkki · 8 years ago
- 1779d53 AGESA: BIST is already preserved by Kyösti Mälkki · 8 years ago
- df7ff31 AGESA: Move romstage main entry under cpu by Kyösti Mälkki · 8 years ago
- 13cf135 AGESA: Move amd_initmmio() call by Kyösti Mälkki · 8 years ago
- 26929bd AGESA: Fix SSE regression and align stack early by Kyösti Mälkki · 8 years ago
- f6fe2f1 AGESA binaryPI: Fix cache-as-ram for x86_64 by Kyösti Mälkki · 8 years ago
- 585d1a0 src/cpu: Capitalize ROM and RAM by Elyes HAOUAS · 8 years ago
- 4a30ab9 cpu/amd: remove .intel_syntax by Patrick Georgi · 9 years ago
- a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
- 67b9430 cpu: port amd/agesa to 64bit by Stefan Reinauer · 9 years ago
- b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
- 8c0cb8a Correct file permissions. by Idwer Vollering · 11 years ago
- 59c3a06 AMD AGESA: Remove INVD instruction when transitioning from CAR by Bruce Griffith · 11 years ago
- a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 11 years ago
- f3b86b3 AMD agesa: add enable cache at the end of disable_cache_as_ram by Siyuan Wang · 12 years ago
- 05e740f Replace cache control magic numbers with symbols by Patrick Georgi · 12 years ago
- f722373 S3 code in coreboot public folder. by zbao · 12 years ago
- 4b50834 Add AMD Family 10 support to cpu folder by efdesign98 · 13 years ago[Renamed (89%) from src/cpu/amd/agesa/family12/cache_as_ram.inc]
- 7c0c64e Addition of Family12/SB900 wrapper code by efdesign98 · 13 years ago