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review.coreboot.org / coreboot / 04be2dd757d54142a62436af8f1677df01b17f10 / src / northbridge
  1. 04be2dd nehalem/raminit: clean up code and use MCHBAR macros by Felix Held · 6 years ago
  2. 29a9c07 nehalem/raminit: remove REAL define and most dead code by Felix Held · 6 years ago
  3. ad691ad sandybridge/raminit_mrc: remove reference to report_platform_info() by Matt DeVillier · 6 years ago
  4. 9fe248f sandybridge/raminit_common: use MCHBAR AND/OR macros in remaining places by Felix Held · 6 years ago
  5. 9cf1dd2 sandybridge/raminit_common: use macro for execute command queue register by Felix Held · 6 years ago
  6. f9b826a sandybridge/raminit_common: use FOR_ALL_CHANNELS macro by Felix Held · 6 years ago
  7. b802c07 sandybridge/raminit_common: use MCHBAR AND/OR/AND_OR macros [2/2] by Felix Held · 6 years ago
  8. 2463aa9 sandybridge/raminit_common: use MCHBAR AND/OR/AND_OR macros [1/2] by Felix Held · 6 years ago
  9. fe68a77 northbridge/sandybridge: add MCHBAR32 AND/OR/AND_OR access macros by Felix Held · 6 years ago
  10. 8908931 nb/intel/gm45: Don't use PCI operations on the pci_domain device by Arthur Heymans · 6 years ago
  11. 15e1b39 nb/intel/pineview: Don't use PCI operations on the pci_domain device by Arthur Heymans · 6 years ago
  12. c6e13b6 nb/intel/x4x: Don't use PCI operations on the pci_domain device by Arthur Heymans · 6 years ago
  13. 1704120 nb/intel/sandybridge: Don't use PCI operations on the pci_domain device by Arthur Heymans · 6 years ago
  14. 432575c x4x/raminit_ddr23: use MCHBAR AND/OR/AND_OR macros [1/2] by Felix Held · 6 years ago
  15. aade90e nb/intel/gm45: Use common code for SMM in TSEG by Arthur Heymans · 7 years ago
  16. 6cd2c2f northbridge/x4x: add MCHBAR AND/OR/AND_OR access macros by Felix Held · 6 years ago
  17. 86b299a northbridge/nehalem: add MCHBAR AND/OR/AND_OR macros by Felix Held · 6 years ago
  18. 00d2b91 northbridge/nehalem: clean up header file by Felix Held · 6 years ago
  19. 2bb3cdf sandybridge/raminit_common: use MCHBAR32 macro everywhere by Felix Held · 6 years ago
  20. 55823c3 sandybridge/raminit: use MCHBAR32 macro everywhere by Felix Held · 6 years ago
  21. b9267f0 sandybridge: add brackets to MCHBAR/EPBAR/DMIBAR access macros by Felix Held · 6 years ago
  22. 708cf4b nb/intel/sandybridge: Bump MRC_CACHE_VERSION by Patrick Rudolph · 6 years ago
  23. ef8c559 nb/intel/sandybridge/report_platform: Move remaining code to sb folder by Patrick Rudolph · 6 years ago
  24. 9e1b9b5 nb/intel/sandybridge: Move CPU report to cpu folder by Patrick Rudolph · 6 years ago
  25. 74203de intel/sandybridge: Don't hardcode platform type by Patrick Rudolph · 7 years ago
  26. 5af2dea nb/intel/sandybridge/raminit: Fix SMBIOS 17 bus width by Patrick Rudolph · 7 years ago
  27. 652c491 nb/intel/sandybridge/raminit: Fix PDWN_mode on desktops by Patrick Rudolph · 7 years ago
  28. 4c2f26c nb/intel/nehalem: Remove the C native graphic init by Arthur Heymans · 6 years ago
  29. db70f3b drivers/tpm: Add TPM ramstage driver for devices without vboot. by Philipp Deppenwiese · 6 years ago
  30. b009ac4 nb/intel/sandybridge/raminit: Fix non ASCII char by Patrick Rudolph · 6 years ago
  31. 5ee9bc1 nb/intel/sandybridge/raminit: Set REFIx9 according to spec by Patrick Rudolph · 7 years ago
  32. edf51d2 AGESA binaryPI: Remove code for CONFIG_CBB!=0 by Kyösti Mälkki · 6 years ago
  33. 113f670 AGESA binaryPI: Fix and optimize for MAX_NODES_NUM by Kyösti Mälkki · 6 years ago
  34. a4fc7be nb/i945/raminit: Correct C0DRAMW & C1DRAMW for 4 DIMMs by Elyes HAOUAS · 6 years ago
  35. fd051dc src/northbridge: Use "foo *bar" instead of "foo* bar" by Elyes HAOUAS · 6 years ago
  36. 21b71ce6 src/nb: Fix non-local header treated as local by Elyes HAOUAS · 6 years ago
  37. 7866d49 arch/x86/acpi: Add DMAR RMRR helper functions by Matt DeVillier · 6 years ago
  38. a8a9f34 sb/intel/i82801{g,j}x: Automatically generate ACPI PIRQ tables by Arthur Heymans · 7 years ago
  39. e798e6a sb/intel/i82801ix: Use the common ACPI pirq generator by Arthur Heymans · 7 years ago
  40. fe25107 nb/intel/i945: Remove dead code by Elyes HAOUAS · 6 years ago
  41. 58a8953 Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location" by Arthur Heymans · 6 years ago
  42. 371e7d9 nb/intel/e7505: Leave ROM as un-cacheable in postcar by Kyösti Mälkki · 6 years ago
  43. aea8eec nb/intel/i440bx: Switch to POSTCAR_STAGE by Kyösti Mälkki · 6 years ago
  44. 5469907 nb/intel/i440bx: Move to RELOCATABLE_RAMSTAGE by Kyösti Mälkki · 6 years ago
  45. 54d6a28 cpu/intel/slot_1: Switch to different CAR setup by Kyösti Mälkki · 6 years ago
  46. 847f12b nb/intel/nehalem: Fix DEVEN defines by Patrick Rudolph · 6 years ago
  47. df946b8 nb/intel/x4x: Issue a hard reset with empty MRC cache on warm reset by Arthur Heymans · 6 years ago
  48. faa5f98 cpu/intel/haswell: Use the common intel romstage_main function by Arthur Heymans · 6 years ago
  49. 5e2ac2c nb/intel/fsp_rangeley: Use MSR_PLATFORM_INFO instead of 0xce by Elyes HAOUAS · 7 years ago
  50. e809305 nb/intel/x4x: Deprecate native graphic init by Arthur Heymans · 6 years ago
  51. 7345a17 nb/intel/x4x: Fix a few things in set_enhanced_mode by Arthur Heymans · 6 years ago
  52. 5a9dbde nb/intel/x4x: Work around a quirk by Arthur Heymans · 6 years ago
  53. 0602ce6 nb/intel/x4x: Add the option for stacked channel map settings by Arthur Heymans · 6 years ago
  54. b0f1988 src: Get rid of unneeded whitespace by Elyes HAOUAS · 6 years ago
  55. 68c851b src: Get rid of device_t by Elyes HAOUAS · 6 years ago
  56. c8a649c src: Use of device_t is deprecated by Elyes HAOUAS · 6 years ago
  57. 3414f60 AGESA binaryPI: Drop RAMBASE and RAMTOP by Kyösti Mälkki · 6 years ago
  58. 1d3fde4 {src,util}: Use NULL instead of 0 for pointer by Elyes HAOUAS · 6 years ago
  59. f2dd049 libgfxinit: Enable G45 support (for GM45/X4X) by Nico Huber · 7 years ago
  60. 4bdfebd nb/intel/pineview: Enable and allocate 8M for TSEG by Arthur Heymans · 6 years ago
  61. e07df9d nb/intel/i945: Enable and allocate 8M for TSEG by Arthur Heymans · 6 years ago
  62. f6d1477 nb/intel/i945: Add a common function to compute TSEG size by Arthur Heymans · 7 years ago
  63. 58d6ff1 intel/e7505: Remove ROMCC workaround by Kyösti Mälkki · 6 years ago
  64. 730df3c arch/x86: Make RELOCATABLE_RAMSTAGE the default by Kyösti Mälkki · 8 years ago
  65. 7904e72 arch/x86: Flag platforms without RELOCATABLE_RAMSTAGE by Kyösti Mälkki · 6 years ago
  66. a0ad6e7 northbridge/amd/lx: Fix function setShadowRCONF by Iru Cai · 7 years ago
  67. 13a500a amd/geode_lx: Fix .c includes by Kyösti Mälkki · 6 years ago
  68. 88af0f3 cpu/intel/haswell: Switch to POSTCAR_STAGE by Arthur Heymans · 6 years ago
  69. 02b13fd cpu/intel/model_2065x: Switch to POSTCAR_STAGE by Arthur Heymans · 6 years ago
  70. 6fcd7b8 cpu/intel/model_206ax: Switch to POSTCAR_STAGE by Arthur Heymans · 6 years ago
  71. 3a4edb6 nb/intel/gm45: Switch to POSTCAR_STAGE by Arthur Heymans · 6 years ago
  72. 4ff675e nb/intel/x4x: Switch to POSTCAR_STAGE by Arthur Heymans · 6 years ago
  73. aa7cf55 nb/intel/pineview: Switch to POSTCAR_STAGE by Arthur Heymans · 6 years ago
  74. 2dcc3a5 nb/intel/i945: Switch to POSTCAR_STAGE by Arthur Heymans · 6 years ago
  75. c07f8fb security/tpm: Unify the coreboot TPM software stack by Philipp Deppenwiese · 6 years ago
  76. 961d31b intel/i440bx: Drop tests for LATE_CBMEM_INIT by Kyösti Mälkki · 6 years ago
  77. 448d9fb src: Use "foo *bar" instead of "foo* bar" by Elyes HAOUAS · 6 years ago
  78. 089b908 nb/intel: Use postcar_frame_add_romcache() by Nico Huber · 6 years ago
  79. 2a5f6cb nb/via/vx900: Get rid of device_t by Elyes HAOUAS · 6 years ago
  80. f369e60 northbridge/intel: Remove unneeded includes by Elyes HAOUAS · 6 years ago
  81. 3e893bb intel/socket_mPGA604 intel/e7505: Switch to POSTCAR_STAGE by Kyösti Mälkki · 6 years ago
  82. 8168046 intel/e7505: Move to RELOCATABLE_RAMSTAGE by Kyösti Mälkki · 6 years ago
  83. 4c0e277 intel/e7505: Assume AGP slot disabled by Kyösti Mälkki · 6 years ago
  84. 717b6e3 aopen/dxplplusu intel/e7505: Move to EARLY_CBMEM_INIT by Kyösti Mälkki · 6 years ago
  85. 9e69c87 intel/e7505: Fix domain resources by Kyösti Mälkki · 6 years ago
  86. 654cc2f {cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriate by Nico Huber · 6 years ago
  87. f99fa10 Remove VIA VX800 northbridge support by Kyösti Mälkki · 6 years ago
  88. e99f039 Remove VIA CX700 northbridge support by Kyösti Mälkki · 6 years ago
  89. ec953bc Remove VIA CN700 northbridge support by Kyösti Mälkki · 6 years ago
  90. d840eb5 Remove AMD K8 cpu and northbridge support by Kyösti Mälkki · 6 years ago
  91. 4979ffc Remove southbridges after K8 board removals by Kyösti Mälkki · 6 years ago
  92. 1740230 Remove all AMD K8 boards by Kyösti Mälkki · 6 years ago
  93. 5474eb1 src/northbridge: Add and update license headers by Martin Roth · 6 years ago
  94. 148b1db nb/intel/fsp_sandybridge: Fix lost const qualifier on 'device_t' by Elyes HAOUAS · 6 years ago
  95. 21fa514 AMD geode/lx: Remove generic_sdram.c include by Kyösti Mälkki · 6 years ago
  96. f7741d7 Remove leftover AMD CIMX RD890 northbridge support by Kyösti Mälkki · 6 years ago
  97. 5b3bf4a nb/amd/amdfam10: Get rid of device_t by Kyösti Mälkki · 6 years ago
  98. 0d28495 nb/intel/x4x: Adapt post JEDEC for DDR3 by Arthur Heymans · 7 years ago
  99. 3fa103a nb/intel/x4x/raminit: Add DDR3 enhanced mode and power settings by Arthur Heymans · 7 years ago
  100. b4a7804 nb/intel/x4x/raminit: Add DDR3 specific dra/drb settings by Arthur Heymans · 7 years ago