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review.coreboot.org / coreboot / 029d997b6eb0c784b844bf554dec5c33286b6507 / src / soc / amd / cezanne / fsp_m_params.c
  1. 029d997 amd/cezanne: Add slow_ppt_time & thermctl_limit to UPD by Martin Roth · 3 years, 4 months ago
  2. 5ad85d9 soc/amd/cezanne/fsp_m_params: Configure the s0i3_enable UPD by Karthikeyan Ramasubramanian · 3 years, 4 months ago
  3. d3be9ba soc/amd/cezanne: add SMU settings to devicetree by Felix Held · 3 years, 4 months ago
  4. d0b5164 soc/amd/cezanne: add downcoring and SMT disable settings to devicetree by Felix Held · 3 years, 4 months ago
  5. ea0f225 soc/amd/cezanne: Pass DXIO and DDI Descriptors to FSP by Matt Papageorge · 3 years, 5 months ago
  6. 5f5ca0c vc/amd/fsp/cezanne: update UPD headers by Matt Papageorge · 3 years, 5 months ago
  7. 2421de6 soc/amd/cezanne: factor out UPD-M configuration from romstage by Felix Held · 3 years, 5 months ago