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review.coreboot.org / coreboot / 0010b89c67354dd4dda1417e6fc990cc3b82f0d4 / src / mainboard / pcengines / apu2 / variants / apu5 / devicetree.cb
  1. 0010b89 nb/amd/pi/00730F01: introduce and use chipset devicetree by Felix Held · 8 months ago
  2. 69cd729 mb/*: Remove lapic from devicetree by Arthur Heymans · 1 year, 8 months ago
  3. c4b7027 src: Remove leading blank lines from SPDX header by Elyes HAOUAS · 4 years, 2 months ago
  4. 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 2 months ago
  5. c49d7a3 src/: Replace GPL boilerplate with SPDX headers by Patrick Georgi · 4 years, 2 months ago
  6. 4d177e4 mb/pcengines/*/devicetree: remove non-existing NCT5104d LDN 0xe by Michał Żygowski · 4 years, 5 months ago
  7. 078bc41 mainboard/[g-p]*: Remove copyright notices by Patrick Georgi · 4 years, 4 months ago
  8. 302951d mb/pcengines/*: enable simple IO-based GPIO control by Piotr Kleinschmidt · 4 years, 6 months ago
  9. 4dba497 binaryPI: Drop nested northbridge in devicetree by Kyösti Mälkki · 5 years ago
  10. 694d18a pcengines/apu2: enable IOMMU for all apu2 variants by Piotr Król · 6 years ago
  11. 70b9245 mainboard/pcengines/apu2: add apu3 and apu5 variants by Kamil Wcislo · 7 years ago