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Vladimir Serbinenko7686a562014-05-18 11:05:56 +02001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2010 Google Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Vladimir Serbinenko7686a562014-05-18 11:05:56 +020014 */
15
16#ifndef RAMINIT_H
17#define RAMINIT_H
18
19#include <device/dram/ddr3.h>
20
21/* The order is ch0dimmA, ch0dimmB, ch1dimmA, ch1dimmB. */
22void init_dram_ddr3(spd_raw_data *spds, int mobile, int min_tck, int s3resume);
23void read_spd(spd_raw_data *spd, u8 addr);
Vladimir Serbinenkofa1d6882014-10-19 02:50:45 +020024void mainboard_get_spd(spd_raw_data *spd);
25void rcba_config(void);
26void pch_enable_lpc(void);
Vladimir Serbinenko609bd942016-01-31 14:00:54 +010027void mainboard_early_init(int s3resume);
Vladimir Serbinenko7686a562014-05-18 11:05:56 +020028
29#endif /* RAMINIT_H */