Eric Biederman | 0ac6b41 | 2003-09-02 17:16:48 +0000 | [diff] [blame] | 1 | #include <bitops.h> |
| 2 | #include <console/console.h> |
| 3 | #include <device/device.h> |
| 4 | #include <device/path.h> |
| 5 | #include <device/pci.h> |
| 6 | #include <part/hard_reset.h> |
| 7 | #include <part/fallback_boot.h> |
| 8 | |
| 9 | static device_t ht_scan_get_devs(device_t *old_devices) |
| 10 | { |
| 11 | device_t first, last; |
| 12 | first = *old_devices; |
| 13 | last = first; |
| 14 | while(last && last->sibling && |
| 15 | (last->sibling->path.u.pci.devfn > last->path.u.pci.devfn)) { |
| 16 | last = last->sibling; |
| 17 | } |
| 18 | if (first) { |
| 19 | *old_devices = last->sibling; |
| 20 | last->sibling = 0; |
| 21 | } |
| 22 | return first; |
| 23 | } |
| 24 | |
| 25 | |
| 26 | struct prev_link { |
| 27 | struct device *dev; |
| 28 | unsigned pos; |
| 29 | unsigned char config_off, freq_off, freq_cap_off; |
| 30 | }; |
| 31 | |
| 32 | static int ht_setup_link(struct prev_link *prev, device_t dev, unsigned pos) |
| 33 | { |
| 34 | static const uint8_t link_width_to_pow2[]= { 3, 4, 0, 5, 1, 2, 0, 0 }; |
| 35 | static const uint8_t pow2_to_link_width[] = { 0x7, 4, 5, 0, 1, 3 }; |
| 36 | unsigned present_width_cap, upstream_width_cap; |
| 37 | unsigned present_freq_cap, upstream_freq_cap; |
| 38 | unsigned ln_present_width_in, ln_upstream_width_in; |
| 39 | unsigned ln_present_width_out, ln_upstream_width_out; |
| 40 | unsigned freq, old_freq; |
| 41 | unsigned present_width, upstream_width, old_width; |
| 42 | int reset_needed; |
| 43 | |
| 44 | /* Set the hypertransport link width and frequency */ |
| 45 | reset_needed = 0; |
| 46 | |
| 47 | /* Read the capabilities */ |
| 48 | present_freq_cap = pci_read_config16(dev, pos + PCI_HT_CAP_SLAVE_FREQ_CAP0); |
| 49 | upstream_freq_cap = pci_read_config16(prev->dev, prev->pos + prev->freq_cap_off); |
| 50 | present_width_cap = pci_read_config8(dev, pos + PCI_HT_CAP_SLAVE_WIDTH0); |
| 51 | upstream_width_cap = pci_read_config8(prev->dev, prev->pos + prev->config_off); |
| 52 | |
| 53 | /* Calculate the highest useable frequency */ |
| 54 | #if 0 |
| 55 | freq = log2(present_freq_cap & upstream_freq_cap); |
| 56 | #else |
| 57 | /* Errata for 8131 - freq 5 has hardware problems don't support it */ |
| 58 | freq = log2(present_freq_cap & upstream_freq_cap & 0x1f); |
| 59 | #endif |
| 60 | |
| 61 | /* Calculate the highest width */ |
| 62 | ln_upstream_width_in = link_width_to_pow2[upstream_width_cap & 7]; |
| 63 | ln_present_width_out = link_width_to_pow2[(present_width_cap >> 4) & 7]; |
| 64 | if (ln_upstream_width_in > ln_present_width_out) { |
| 65 | ln_upstream_width_in = ln_present_width_out; |
| 66 | } |
| 67 | upstream_width = pow2_to_link_width[ln_upstream_width_in]; |
| 68 | present_width = pow2_to_link_width[ln_upstream_width_in] << 4; |
| 69 | |
| 70 | ln_upstream_width_out = link_width_to_pow2[(upstream_width_cap >> 4) & 7]; |
| 71 | ln_present_width_in = link_width_to_pow2[present_width_cap & 7]; |
| 72 | if (ln_upstream_width_out > ln_present_width_in) { |
| 73 | ln_upstream_width_out = ln_present_width_in; |
| 74 | } |
| 75 | upstream_width |= pow2_to_link_width[ln_upstream_width_out] << 4; |
| 76 | present_width |= pow2_to_link_width[ln_upstream_width_out]; |
| 77 | |
| 78 | /* Set the current device */ |
| 79 | old_freq = pci_read_config8(dev, pos + PCI_HT_CAP_SLAVE_FREQ0); |
| 80 | if (freq != old_freq) { |
| 81 | pci_write_config8(dev, pos + PCI_HT_CAP_SLAVE_FREQ0, freq); |
| 82 | reset_needed = 1; |
| 83 | printk_spew("HyperT FreqP old %x new %x\n",old_freq,freq); |
| 84 | } |
| 85 | old_width = pci_read_config8(dev, pos + PCI_HT_CAP_SLAVE_WIDTH0 + 1); |
| 86 | if (present_width != old_width) { |
| 87 | pci_write_config8(dev, pos + PCI_HT_CAP_SLAVE_WIDTH0 + 1, present_width); |
| 88 | reset_needed = 1; |
| 89 | printk_spew("HyperT widthP old %x new %x\n",old_width, present_width); |
| 90 | } |
| 91 | |
| 92 | /* Set the upstream device */ |
| 93 | old_freq = pci_read_config8(prev->dev, prev->pos + prev->freq_off); |
| 94 | old_freq &= 0x0f; |
| 95 | if (freq != old_freq) { |
| 96 | pci_write_config8(prev->dev, prev->pos + prev->freq_off, freq); |
| 97 | reset_needed = 1; |
| 98 | printk_spew("HyperT freqU old %x new %x\n", old_freq, freq); |
| 99 | } |
| 100 | old_width = pci_read_config8(prev->dev, prev->pos + prev->config_off + 1); |
| 101 | if (upstream_width != old_width) { |
| 102 | pci_write_config8(prev->dev, prev->pos + prev->config_off + 1, upstream_width); |
| 103 | reset_needed = 1; |
| 104 | printk_spew("HyperT widthU old %x new %x\n", old_width, upstream_width); |
| 105 | } |
| 106 | |
| 107 | /* Remember the current link as the previous link */ |
| 108 | prev->dev = dev; |
| 109 | prev->pos = pos; |
| 110 | prev->config_off = PCI_HT_CAP_SLAVE_WIDTH1; |
| 111 | prev->freq_off = PCI_HT_CAP_SLAVE_FREQ1; |
| 112 | prev->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP1; |
| 113 | |
| 114 | return reset_needed; |
| 115 | |
| 116 | } |
| 117 | |
| 118 | static unsigned ht_lookup_slave_capability(struct device *dev) |
| 119 | { |
| 120 | unsigned pos; |
| 121 | pos = 0; |
| 122 | switch(dev->hdr_type & 0x7f) { |
| 123 | case PCI_HEADER_TYPE_NORMAL: |
| 124 | case PCI_HEADER_TYPE_BRIDGE: |
| 125 | pos = PCI_CAPABILITY_LIST; |
| 126 | break; |
| 127 | } |
| 128 | if (pos > PCI_CAP_LIST_NEXT) { |
| 129 | pos = pci_read_config8(dev, pos); |
| 130 | } |
| 131 | while(pos != 0) { /* loop through the linked list */ |
| 132 | uint8_t cap; |
| 133 | cap = pci_read_config8(dev, pos + PCI_CAP_LIST_ID); |
| 134 | printk_spew("Capability: 0x%02x @ 0x%02x\n", cap, pos); |
| 135 | if (cap == PCI_CAP_ID_HT) { |
| 136 | unsigned flags; |
| 137 | flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS); |
| 138 | printk_spew("flags: 0x%04x\n", (unsigned)flags); |
| 139 | if ((flags >> 13) == 0) { |
| 140 | /* Entry is a Slave secondary, success...*/ |
| 141 | break; |
| 142 | } |
| 143 | } |
| 144 | if(pos) { |
| 145 | pos = pci_read_config8(dev, pos + PCI_CAP_LIST_NEXT); |
| 146 | } |
| 147 | } |
| 148 | return pos; |
| 149 | } |
| 150 | |
| 151 | static void ht_collapse_early_enumeration(struct bus *bus) |
| 152 | { |
| 153 | unsigned int devfn; |
| 154 | |
| 155 | /* Spin through the devices and collapse any early |
| 156 | * hypertransport enumeration. |
| 157 | */ |
| 158 | for(devfn = 0; devfn <= 0xff; devfn += 8) { |
| 159 | struct device dummy; |
| 160 | uint32_t id; |
| 161 | unsigned pos, flags; |
| 162 | dummy.bus = bus; |
| 163 | dummy.path.type = DEVICE_PATH_PCI; |
| 164 | dummy.path.u.pci.devfn = devfn; |
| 165 | id = pci_read_config32(&dummy, PCI_VENDOR_ID); |
| 166 | if (id == 0xffffffff || id == 0x00000000 || |
| 167 | id == 0x0000ffff || id == 0xffff0000) { |
| 168 | continue; |
| 169 | } |
| 170 | dummy.vendor = id & 0xffff; |
| 171 | dummy.device = (id >> 16) & 0xffff; |
| 172 | dummy.hdr_type = pci_read_config8(&dummy, PCI_HEADER_TYPE); |
| 173 | pos = ht_lookup_slave_capability(&dummy); |
| 174 | if (!pos){ |
| 175 | continue; |
| 176 | } |
| 177 | |
| 178 | /* Clear the unitid */ |
| 179 | flags = pci_read_config16(&dummy, pos + PCI_CAP_FLAGS); |
| 180 | flags &= ~0x1f; |
| 181 | pci_write_config16(&dummy, pos + PCI_CAP_FLAGS, flags); |
| 182 | printk_spew("Collapsing %s [%04x/%04x]\n", |
| 183 | dev_path(&dummy), dummy.vendor, dummy.device); |
| 184 | } |
| 185 | } |
| 186 | |
| 187 | unsigned int hypertransport_scan_chain(struct bus *bus, unsigned int max) |
| 188 | { |
| 189 | unsigned next_unitid, last_unitid, previous_unitid; |
| 190 | uint8_t previous_pos; |
| 191 | device_t old_devices, dev, func, *chain_last; |
| 192 | unsigned min_unitid = 1; |
| 193 | int reset_needed; |
| 194 | struct prev_link prev; |
| 195 | |
| 196 | /* Restore the hypertransport chain to it's unitialized state */ |
| 197 | ht_collapse_early_enumeration(bus); |
| 198 | |
| 199 | /* See which static device nodes I have */ |
| 200 | old_devices = bus->children; |
| 201 | bus->children = 0; |
| 202 | chain_last = &bus->children; |
| 203 | |
| 204 | /* Initialize the hypertransport enumeration state */ |
| 205 | reset_needed = 0; |
| 206 | prev.dev = bus->dev; |
| 207 | prev.pos = bus->cap; |
| 208 | prev.config_off = PCI_HT_CAP_HOST_WIDTH; |
| 209 | prev.freq_off = PCI_HT_CAP_HOST_FREQ; |
| 210 | prev.freq_cap_off = PCI_HT_CAP_HOST_FREQ_CAP; |
| 211 | |
| 212 | /* If present assign unitid to a hypertransport chain */ |
| 213 | last_unitid = min_unitid -1; |
| 214 | next_unitid = min_unitid; |
| 215 | previous_pos = 0; |
| 216 | do { |
| 217 | uint32_t id, class; |
| 218 | uint8_t hdr_type, pos; |
| 219 | uint16_t flags; |
| 220 | unsigned count, static_count; |
| 221 | |
| 222 | previous_unitid = last_unitid; |
| 223 | last_unitid = next_unitid; |
| 224 | |
| 225 | /* Get setup the device_structure */ |
| 226 | dev = ht_scan_get_devs(&old_devices); |
| 227 | |
| 228 | if (!dev) { |
| 229 | struct device dummy; |
| 230 | dummy.bus = bus; |
| 231 | dummy.path.type = DEVICE_PATH_PCI; |
| 232 | dummy.path.u.pci.devfn = 0; |
| 233 | id = pci_read_config32(&dummy, PCI_VENDOR_ID); |
| 234 | /* If the chain is fully enumerated quit */ |
| 235 | if (id == 0xffffffff || id == 0x00000000 || |
| 236 | id == 0x0000ffff || id == 0xffff0000) { |
| 237 | break; |
| 238 | } |
| 239 | dev = alloc_dev(bus, &dummy.path); |
| 240 | } |
| 241 | else { |
| 242 | /* Add this device to the pci bus chain */ |
| 243 | *chain_last = dev; |
| 244 | /* Run the magice enable/disable sequence for the device */ |
| 245 | if (dev->ops && dev->ops->enable) { |
| 246 | dev->ops->enable(dev); |
| 247 | } |
| 248 | /* Now read the vendor and device id */ |
| 249 | id = pci_read_config32(dev, PCI_VENDOR_ID); |
| 250 | } |
| 251 | /* Update the device chain tail */ |
| 252 | for(func = dev; func; func = func->sibling) { |
| 253 | chain_last = &func->sibling; |
| 254 | } |
| 255 | |
| 256 | /* Read the rest of the pci configuration information */ |
| 257 | hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE); |
| 258 | class = pci_read_config32(dev, PCI_CLASS_REVISION); |
| 259 | |
| 260 | /* Store the interesting information in the device structure */ |
| 261 | dev->vendor = id & 0xffff; |
| 262 | dev->device = (id >> 16) & 0xffff; |
| 263 | dev->hdr_type = hdr_type; |
| 264 | /* class code, the upper 3 bytes of PCI_CLASS_REVISION */ |
| 265 | dev->class = class >> 8; |
| 266 | |
| 267 | /* Find the hypertransport link capability */ |
| 268 | pos = ht_lookup_slave_capability(dev); |
| 269 | if (pos == 0) { |
| 270 | printk_err("Hypertransport link capability not found"); |
| 271 | break; |
| 272 | } |
| 273 | |
| 274 | /* Update the Unitid of the current device */ |
| 275 | flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS); |
| 276 | flags &= ~0x1f; /* mask out base Unit ID */ |
| 277 | flags |= next_unitid & 0x1f; |
| 278 | pci_write_config16(dev, pos + PCI_CAP_FLAGS, flags); |
| 279 | |
| 280 | /* Update the Unitd id in the device structure */ |
| 281 | static_count = 1; |
| 282 | for(func = dev; func; func = func->sibling) { |
| 283 | func->path.u.pci.devfn += (next_unitid << 3); |
| 284 | static_count = (func->path.u.pci.devfn >> 3) |
| 285 | - (dev->path.u.pci.devfn >> 3) + 1; |
| 286 | } |
| 287 | |
| 288 | /* Compute the number of unitids consumed */ |
| 289 | count = (flags >> 5) & 0x1f; /* get unit count */ |
| 290 | printk_spew("%s count: %04x static_count: %04x\n", |
| 291 | dev_path(dev), count, static_count); |
| 292 | if (count < static_count) { |
| 293 | count = static_count; |
| 294 | } |
| 295 | |
| 296 | /* Update the Unitid of the next device */ |
| 297 | next_unitid += count; |
| 298 | |
| 299 | /* Setup the hypetransport link */ |
| 300 | reset_needed |= ht_setup_link(&prev, dev, pos); |
| 301 | |
| 302 | printk_debug("%s [%04x/%04x] %s next_unitid: %04x\n", |
| 303 | dev_path(dev), |
| 304 | dev->vendor, dev->device, |
| 305 | (dev->enable? "enabled": "disabled"), next_unitid); |
| 306 | |
| 307 | } while((last_unitid != next_unitid) && (next_unitid <= 0x1f)); |
| 308 | #if HAVE_HARD_RESET == 1 |
| 309 | if(reset_needed) { |
| 310 | printk_info("HyperT reset needed\n"); |
| 311 | hard_reset(); |
| 312 | } |
| 313 | printk_debug("HyperT reset not needed\n"); |
| 314 | #endif |
| 315 | if (next_unitid > 0x1f) { |
| 316 | next_unitid = 0x1f; |
| 317 | } |
| 318 | return pci_scan_bus(bus, 0x00, (next_unitid << 3)|7, max); |
| 319 | } |