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Stefan Reinauer52db0b92012-12-07 17:15:04 -08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2010 Google Inc
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2 of
9 * the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
19 * MA 02110-1301 USA
20 */
21
Stefan Reinauer52db0b92012-12-07 17:15:04 -080022#include <bootblock_common.h>
David Hendricksbba80902013-03-14 15:24:57 -070023#include <arch/cache.h>
David Hendricks3d7344a2013-01-08 21:05:06 -080024#include <arch/hlt.h>
David Hendricks50c0a502013-01-31 17:05:50 -080025#include <arch/stages.h>
Hung-Te Linfe187922013-02-01 01:09:24 +080026#include <cbfs.h>
Hung-Te Linb868d402013-02-06 22:01:18 +080027#include <console/console.h>
David Hendricks50c0a502013-01-31 17:05:50 -080028
29#include "stages.c"
Stefan Reinauer52db0b92012-12-07 17:15:04 -080030
David Hendricks3d7344a2013-01-08 21:05:06 -080031static int boot_cpu(void)
32{
33 /*
34 * FIXME: This is a stub for now. All non-boot CPUs should be
35 * waiting for an interrupt. We could move the chunk of assembly
36 * which puts them to sleep in here...
37 */
38 return 1;
39}
Stefan Reinauer52db0b92012-12-07 17:15:04 -080040
David Hendricks50c0a502013-01-31 17:05:50 -080041void main(void)
Stefan Reinauer52db0b92012-12-07 17:15:04 -080042{
Hung-Te Lin5f83f6c2013-02-04 14:38:03 +080043 const char *stage_name = "fallback/romstage";
44 void *entry;
David Hendricksbba80902013-03-14 15:24:57 -070045 uint32_t sctlr;
46
47 /* Globally disable MMU, caches, and branch prediction (these should
48 * be disabled by default on reset) */
49 sctlr = read_sctlr();
50 sctlr &= ~(SCTLR_M | SCTLR_C | SCTLR_Z | SCTLR_I);
51 write_sctlr(sctlr);
52
53 armv7_invalidate_caches();
54
55 /*
56 * Re-enable caches and branch prediction. MMU will be set up later.
57 * Note: If booting from USB, we need to disable branch prediction
58 * before copying from USB into RAM (FIXME: why?)
59 */
60 sctlr = read_sctlr();
61 sctlr |= SCTLR_C | SCTLR_Z | SCTLR_I;
62 write_sctlr(sctlr);
Stefan Reinauer52db0b92012-12-07 17:15:04 -080063
64 if (boot_cpu()) {
David Hendricksfba42a72013-01-17 15:07:35 -080065 bootblock_cpu_init();
David Hendricks211a5d52013-01-17 20:52:21 -080066 bootblock_mainboard_init();
Stefan Reinauer52db0b92012-12-07 17:15:04 -080067 }
David Hendricks3d7344a2013-01-08 21:05:06 -080068
Hung-Te Linb868d402013-02-06 22:01:18 +080069 console_init();
Hung-Te Lin5f83f6c2013-02-04 14:38:03 +080070 printk(BIOS_INFO, "hello from bootblock\n");
David Hendricks211a5d52013-01-17 20:52:21 -080071 printk(BIOS_INFO, "bootblock main(): loading romstage\n");
Hung-Te Lin5f83f6c2013-02-04 14:38:03 +080072 entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, stage_name);
Hung-Te Lin6fe0cab2013-01-22 18:57:56 +080073
David Hendricks211a5d52013-01-17 20:52:21 -080074 printk(BIOS_INFO, "bootblock main(): jumping to romstage\n");
Hung-Te Lin5f83f6c2013-02-04 14:38:03 +080075 if (entry) stage_exit(entry);
Stefan Reinauer52db0b92012-12-07 17:15:04 -080076 hlt();
77}