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review.coreboot.org / coreboot / 0afcba7a3d0e7dc22818ecdfd79230f5fb987f0d / . / src / arch / i386 / lib / c_start.S
blob: c82da2f76e4d0044775fb6d459ed34b744b8988a [file] [log] [blame]
Eric Biederman8ca8d762003-04-22 19:02:15 +0000[diff] [blame]1#include <arch/asm.h>
2#include <arch/intel.h>
Eric Biederman8ca8d762003-04-22 19:02:15 +0000[diff] [blame]3 .section ".text"
4 .code32
5 .globl _start
6_start:
7 cli
8 lgdt %cs:gdtaddr
9 ljmp $0x10, $1f
101: movl $0x18, %eax
11 movl %eax, %ds
12 movl %eax, %es
13 movl %eax, %ss
14 movl %eax, %fs
15 movl %eax, %gs
16
17 intel_chip_post_macro(0x13) /* post 12 */
18
19 /** clear stack */
Eric Biedermanae948f72003-07-14 20:40:38 +0000[diff] [blame]20 leal _stack, %edi
21 movl $_estack, %ecx
Eric Biederman8ca8d762003-04-22 19:02:15 +0000[diff] [blame]22 subl %edi, %ecx
23 xorl %eax, %eax
24 rep
25 stosb
26
27 /** clear bss */
Eric Biedermanae948f72003-07-14 20:40:38 +0000[diff] [blame]28 leal _bss, %edi
29 movl $_ebss, %ecx
Eric Biederman8ca8d762003-04-22 19:02:15 +0000[diff] [blame]30 subl %edi, %ecx
31 jz .Lnobss
32 xorl %eax, %eax
33 rep
34 stosb
35.Lnobss:
36
37 /* set new stack */
38 movl $_estack, %esp
Eric Biederman8ca8d762003-04-22 19:02:15 +0000[diff] [blame]39
Eric Biedermanb78c1972004-10-14 20:54:17 +0000[diff] [blame]40 /* Push the cpu index and struct cpu */
41 pushl $0
42 pushl $0
Eric Biederman8ca8d762003-04-22 19:02:15 +0000[diff] [blame]43
44 /* push the boot_complete flag */
45 pushl %ebp
46
47 /* Save the stack location */
48 movl %esp, %ebp
49
50 /*
51 * Now we are finished. Memory is up, data is copied and
52 * bss is cleared. Now we call the main routine and
53 * let it do the rest.
54 */
55 intel_chip_post_macro(0xfe) /* post fe */
56
Eric Biedermanb78c1972004-10-14 20:54:17 +0000[diff] [blame]57 /* Restore the stack location */
Eric Biederman8ca8d762003-04-22 19:02:15 +0000[diff] [blame]58 movl %ebp, %esp
59
60 /* The boot_complete flag has already been pushed */
Eric Biedermanae948f72003-07-14 20:40:38 +0000[diff] [blame]61 call hardwaremain
Eric Biederman8ca8d762003-04-22 19:02:15 +0000[diff] [blame]62 /*NOTREACHED*/
63.Lhlt:
64 intel_chip_post_macro(0xee) /* post fe */
65 hlt
66 jmp .Lhlt
67
68
69 .globl gdt, gdt_end, gdt_limit
70
71gdt_limit = gdt_end - gdt - 1 /* compute the table limit */
72gdtaddr:
73 .word gdt_limit
74 .long gdt /* we know the offset */
75
76gdt:
77// selgdt 0
78 .word 0x0000, 0x0000 /* dummy */
79 .byte 0x00, 0x00, 0x00, 0x00
80
81// selgdt 8
82 .word 0x0000, 0x0000 /* dummy */
83 .byte 0x00, 0x00, 0x00, 0x00
84
85// selgdt 0x10
86/* flat code segment */
87 .word 0xffff, 0x0000
88 .byte 0x00, 0x9b, 0xcf, 0x00
89
90//selgdt 0x18
91/* flat data segment */
92 .word 0xffff, 0x0000
93 .byte 0x00, 0x93, 0xcf, 0x00
94
95//selgdt 0x20
96 .word 0x0000, 0x0000 /* dummy */
97 .byte 0x00, 0x00, 0x00, 0x00
98
Ronald G. Minnich02fa3b22004-10-06 17:33:54 +0000[diff] [blame]99#if defined(CONFIG_LEGACY_VGABIOS) && (CONFIG_LEGACY_VGABIOS == 1)
Eric Biederman8ca8d762003-04-22 19:02:15 +0000[diff] [blame]100 // from monty:
101 /* 0x00009a00,0000ffffULL, 20h: 16-bit 64k code at 0x00000000 */
102 /* 0x00009200,0000ffffULL 28h: 16-bit 64k data at 0x00000000 */
103// selgdt 0x28
104/*16-bit 64k code at 0x00000000 */
105 .word 0xffff, 0x0000
106 .byte 0, 0x9a, 0, 0
107
108// selgdt 0x30
109/*16-bit 64k data at 0x00000000 */
110 .word 0xffff, 0x0000
111 .byte 0, 0x92, 0, 0
112#endif // defined(CONFIG_VGABIOS) && (CONFIG_VGABIOS == 1)
113gdt_end:
114
115.code32